• Title/Summary/Keyword: 40-GHz

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A Design and Fabrication of 120 GHz Local Oscillator (120 GHz 국부발진기의 설계 및 제작)

  • Lee, Won-Hui;Chung, Tae-Jin
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.10 no.6
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    • pp.71-76
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    • 2010
  • In this paper, a 120 GHz local oscillator(LO) for the sub-harmonic mixer in the THz transceiver with a carrier frequency of 240 GHz was designed and fabricated. A 120 GHz local oscillator was composed of 40 GHz PLL(Phase Locked Loop), 40 GHz BPF(Band Pass Filter), frequency tripler and 120 GHz BPF. The commercial model of the frequency tripler was used. The measured result of the 40 GHz PLL showed the phase noise of -105 dBc/Hz at the 100 kHz offset frequency. The measured result of 120 GHz BPF showed the insertion loss of 1.3 dB at center frequency of 119 GHz with bandwidth of 5 GHz. The output power of 120 GHz LO was measured to 6.6 dBm.

Design of Rectangular Planar Monopole Antenna with a Double Sleeve (이중 슬리브를 갖는 직사각형 평면 모노폴 안테나 설계)

  • Kang, Sang-Won;Chang, Tae-Soon
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.16 no.1
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    • pp.215-220
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    • 2016
  • In this paper, a wideband antenna accomplished by adding a double sleeve of a rectangular planar monopole structure is proposed. In order to impedance matching of proposed antenna, the antenna performance was improved by adding two gap sleeves and outer sleeve for double sleeve structure. HFSS simulator of ANSYS corp. was used in order to confirm the antenna parameter characteristic. According to the simulation results, the VSWR was less than 2 for the range of 2.5GHz~10.5GHz. The frequency bandwidth is 8GHz. The frequency range of the actual fabricated antenna was 2.92GHz~10.32GHz, the frequency bandwidth is 7.4GHz. The measured radiation pattern frequency is 3GHz, 6GHz and 9GHz. The results are similar with dipole antenna pattern in all frequency. The antenna size is $40{\times}40mm^2$. The utilization possibility of the ultra-wideband planar monopole antenna could be confirmed according to compare and analyze the simulation and measurement data.

A Stable 40 GHz Pulse Train Generation by Pulse Repetition-Frequency Quadruplication Using a Fiber Fabry-Perot Interferometer

  • Ruan, Wan-Yong;Park, Jae-Hyun;Seo, Dong-Sun
    • Journal of IKEEE
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    • v.12 no.4
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    • pp.234-238
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    • 2008
  • We demonstrate a simple method to generate a stable 40 GHz pulse train at 1550 nm by spectral filtering of a 10 GHz mode.locked pulse source using a fiber Fabry-Perot interferometer (FFPI). A high finesse FFPI with a 40 GHz free spectral range blocks successfully unwanted spectral components of a 10 GHz pulse source and passes only 40 GHz spaced spectral lines ensuring pulse repetition-frequency quadruplication of the input pulses.

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도파관-마이크로스트립간의 트랜지션 설계

  • 이문수
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.15 no.9
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    • pp.722-728
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    • 1990
  • A comppact waveguide to microstrip transition to be used for measurements of the performances of the U-band MMIC power amplifier is designed and fabricated. A Tchebyscheff ${\lambda}$/4 impedence transformer is adopted as an impedence converter of the transition. The designed transition is optimized to get Su less then -28dB over the 40-to-48GHZ band using Supper Compact program. The measured results shows that insertion loss and return loss are typically 0.3 and 25dB respectively over 40-to-47GHz.

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Design and Analysis of Dual Band I/Q Modulator For Wireless LAN (무선랜용 이중대역 I/Q 모듈레이터의 설계 및 특성 해석)

  • Park, Hyun-Woo;Koo, Kyung-Heon
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.45 no.3
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    • pp.1-6
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    • 2008
  • A dual band I/Q modulator which converts baseband input signals to 2.4GHz or 5GHz RF output has been proposed. The dual band I/Q modulator for 2.4GHz and 5GHz wireless LAN applications consists of $90^{\circ}$ phase shifter and wideband mixer. The I/Q modulator showed 15dB conversion loss at 2.4GHz and 16dB conversion loss at 5GHz. The sideband suppression is about 15dBc at 2.4GHz and 16dBc at 5GHz. Measured data shows 8.5% EVM at 2.4GHz, and 10% EVM at 5GHz for QPSK with symbol rate of 11Mbps. A carrier rejection is about 40dBc at 2.4GHz/5GHz band, and the I/Q modulator satisfied the output wireless LAN spectrum mask with baseband input signal.

A Design of 40GHz CMOS VCO (Voltage Controlled Oscillator) for High Speed Communication System (고속 통신 시스템을 위한 40GHz CMOS 전압 제어 발진기의 설계)

  • Lee, Jongsuk;Moon, Yong
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.3
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    • pp.55-60
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    • 2014
  • For an high speed communication, a 40GHz VCO was implemented using a 0.11um standard CMOS technology. The mm-wave VCO was designed by a LC type using a spiral inductor, and a simplified architecture with buffers and a smart biasing technique were used to get a high performance. The frequency range of the proposed VCO is 34~40GHz which is suitable for mm-Wave communication system. It has an output power of -16dBm and 16% tuning range. And the phase noise is -100.33dBc/Hz at 1MHz offset at 38GHz fundamental frequency. The total power consumption of VCO including PADs is 16.8mW with 1.2V supply voltage. The VCO achieves the FOMT of -183.8dBc/Hz which is better than previous VOCs.

A Study on the Development of 38 GHz Hybrid Power Amplifier Module (38 GHz 하이브리드 전력증폭기 모듈 개발에 관한 연구)

  • 윤양훈
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.10B
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    • pp.1701-1706
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    • 2000
  • In this work a 38 GHz hybrid 2-stage power amplifier module using GaAs pHEMTs and waveguide to microstrip transitions has been successfully developed. A 10 mil thickness duroid substrate was use for fabrication of the power amplifier and the waveguide to microstrip transitions. The fabricated waveguide to microstrip transition showed about 1 dB insertion loss(back to back) at 32-40 GHz. The measured results of power amplifier module showed 29 dBm output power(P1.5dB), 7,2 dB associated gain and 11.2% power-added efficiency(PAE) at 36.8-38.5 GHz.

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Theoretical and experimental study on ultrahigh-speed clock recovery system with optical phase lock loop using TOAD (TOAD를 이용한 40 Gbit/s OPLL Clock Recovery 시스템에 대한 연구)

  • Ki, Ho-Jin;Jhon, Young-Min;Byun, Young-Tae;Woo, Deok-Ha
    • Korean Journal of Optics and Photonics
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    • v.16 no.1
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    • pp.21-26
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    • 2005
  • 10 GHz clock recovery from 40 Gbit/s optical time-division-multiplexed(OTDM) signal pulses was experimentally demonstrated using an optical phase lock loop based on a terahertz optical asymmetric demultiplexer(TOAD) with a local-reference-oscillator-free electronic feedback circuit. The 10 GHz clock was successfully extracted from 40 Gbit/s signals. The SNR of the time-extracted 10 GHz RF signal to the side components was larger than 40 dB. Also we performed numerical simulation about the extraction process of phase information in TOAD. The lock-in frequency range of the clock recovery is found to be 10 kHz.

A Study on Rectangular Planar Monopole Antenna with a Double Sleeve Using Half Cutting (하프 커팅을 이용한 이중 슬리브를 갖는 직사각형 평면 모노폴 안테나에 관한 연구)

  • Kang, Sang-Won;Chang, Tae-Soon;Choe, Gwang-Je
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.17 no.2
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    • pp.257-262
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    • 2017
  • In this paper, we proposed a rectangular planar monopole antenna with a double sleeve that applied to a half-cut and a discontinuous feed structure. A rectangular planar monopole antenna with a double sleeve was cut in half along the magnetic symmetry line, and impedance matching was achieved by a discontinuous structure was applied to a feeder and by adjusting the double sleeve gap. We used the HFSS simulator of ANSYS company to confirm the antenna parameter property, and the antenna size was $21{\times}40mm^2$. In the proposed antenna, the simulation frequency range with VSWR of 2 or less was 2.6GHz to 10.25GHz. The bandwidth was 7.65GHz. The frequency range of the fabricated antenna was 3.3GHz to 9.75GHz, and the bandwidth was 6.45GHz. The measured radiation pattern frequencies were 3.5GHz, 5.5GHz, 7.5GHz, and 9.5GHz. A radiation pattern similar to the dipole antenna pattern was obtained at all frequencies.

Design and Implementation of a 40 Gb/s Clock Recovery Module Using a Phase-Locked Loop with the Clock-Hold Function (클락 유지 기능을 가지는 위상 고정 루프를 사용한 40 Gb/s 클락 복원 모듈 설계 및 구현)

  • Park Hyun;Woo Dong-Sik;Kim Jin-Jung;Lim Sang-Kyu;Kim Kang-Wook
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.2 s.105
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    • pp.171-177
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    • 2006
  • A low-cost, high-performance 40 Gb/s clock recovery module using a phase-locked loop(PLL) for a 40 Gb/s optical receiver with the clock-hold function has been designed and implemented. It consists of a clock extractor circuit, an RF mixer and a frequency discriminator for phase/frequency detection, a VC-DRO, a phase shifter, and a clock-hold circuit. The extracted 40 GHz clock is synchronized with a stable 10 GHz VC-DRO. The clock stability and jitter characteristics of the implemented PLL-based clock recovery module are significantly improved as compared with those of the conventional open-loop type clock recovery module with a DR filter. The measured peak-to-peak RMS jitter is about 230 fs. When an input signal is dropped, the 40 GHz clock is maintained continuously by the hold circuit.