• ETRI Journal
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• 제39권4호
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• pp.582-591
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• 2017

To address the wire complexity problem in large-scale globally asynchronous, locally synchronous systems, a current-mode ternary encoding scheme was devised for a two-phase asynchronous protocol. However, for data transmission through a very long wire, few studies have been conducted on reducing the long propagation delay in current-mode circuits. Hence, this paper proposes a current steering logic (CSL) that is able to minimize the long delay for the devised current-mode ternary encoding scheme. The CSL creates pulse signals that charge or discharge the output signal in advance for a short period of time, and as a result, helps prevent a slack in the current signals. The encoder and decoder circuits employing the CSL are implemented using $0.25-{\mu}m$ CMOS technology. The results of an HSPICE simulation show that the normal and optimal mode operations of the CSL achieve a delay reduction of 11.8% and 28.1%, respectively, when compared to the original scheme for a 10-mm wire. They also reduce the power-delay product by 9.6% and 22.5%, respectively, at a data rate of 100 Mb/s for the same wire length.

• Structural Engineering and Mechanics
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• 제17권3_4호
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• pp.331-346
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• 2004

A new sensor system is proposed for measuring damage indexes. The damage index is a physical value that is well correlated to a critical damage in a device or a structure. The mechanism proposed here utilizes elastic buckling of a thin wire and does not require any external power supply for memorizing the index. The mechanisms to detect peak strain, peak displacement, peak acceleration and cumulative deformation as examples of damage indexes are presented. Furthermore, passive and active wireless data retrieval mechanisms using electromagnetic induction are proposed. The passive wireless system is achieved by forming a closed LC circuit to oscillate at its natural frequency. The active wireless sensor can transmit the data much further than the passive system at the sacrifice of slightly complicated electric circuit for the sensor. For wireless data retrieval, no wire is needed for the sensor to supply electrical power. For the active system, electrical power is supplied to the sensor by radio waves emitted from the retrieval system. Thus, external power supply is only needed for the retrieval system when the retrieval becomes necessary. Theoretical and experimental studies to show excellent performance of the proposed sensor are presented. Finally, a prototype damage index sensor installed into a 7 storey base-isolated building is explained.

• 조명전기설비학회논문지
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• 제18권4호
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• pp.60-67
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• 2004

비선형 부하의 증가로 3상 4선식 배전계통을 채용하는 중성선에는 많은 중성선 고조파 전류가 관측되고 있다. 또한 접지 임피던스는 고주파가 있는 중성선 전류에 영향 끼친다고 알려져 있다. 현장에서 실측한 고조파 전압과 전류, 그리고 대지 고유 저항률과 접지 저항을 토대로 고조파 해석용 등가 회로를 구성하였다. MATLAB과 CDEGS 프로그램으로 시뮬레이션 하여 수치와 파형으로 적절한 결과를 도출하였다.

• 전기학회논문지P
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• 제58권4호
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• pp.427-431
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• 2009

In this study, the dynamic characteristic of a contact wire and pantograph suppling electrical power to high-speed trains are investigated from an electrical response point of view. To analysis power line disturbance by induced contact loss phenomenon for high speed operation, a hardware Simulator which considered contact loss between contact wire and the pantograph as well as contact wire deviation is developed. It is confirmed that a contact wire and pantograph model are necessary for studying the dynamic behavior of the pantograph system. One of the most important needs accompanied by increasing the speed of high-speed train is reduced that an arc phenomenon by loss of contact brings out EMI. In case of a high-speed train using electrical power, as comparison with diesel rolling stock, PLD(Power Line Disturbance) such as harmonic, transient voltage and current, EMI(Electromagnetic Interference), dummy signal injection etc usually occurs. Throughout experiment, it is verified that an arc phenomenon is brought out for simulator operation and consequently conducted noise is flowed in electric circuit by power line disturbance.

• 전자공학회논문지C
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• 제36C권8호
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• pp.35-45
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• 1999

본 논문에서는 $GF(p^m)$상에서 두 다항식의 가산 및 승산 알고리즘을 제시하였고, 가산 및 승산 알고리즘을 수행하는 전류 모드 CMOS에 의한 $GF(4^3)$상의 직렬 입력-병렬 출력 모듈 구조의 4치 연산기를 구현하였다. 제시된 전류 모드 CMOS 4치 연산기는 가산/승산 선택 회로, mod(4) 승산 연산 회로, mod(4) 가산 연산 회로를 2개 연결하여 구성한 MOD 연산회로, mod(4) 승산 연산 회로와 동일하게 동작하는 원시 기약 다항식 연산 회로에 의해 구현하였으며, PSpice 시뮬레이션을 통하여 이 회로들에 대하여 동작 특성을 보였다. 제시된 회로들의 시뮬레이션은 $2{\mu}m$ CMOS 기술을 이용하고, 단위 전류를 $15{\mu}A$로 하였으며, VDD 전압은 3.3V을 사용하였다. 본 논문에서 제시한 전류 모드 CMOS의 4치 연산기는 회선 경로 선택의 규칙성, 간단성, 셀 배열에 의한 모듈성의 이점을 가지며, 특히 차수 m이 증가하는 유한체상의 두 다항식의 가산 및 승산에서 확장성을 가지므로 VLSI화 실현에 적합할 것으로 생각된다.

• 한국기계가공학회지
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• 제13권4호
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• pp.75-82
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• 2014

A pin-type load-cell which uses shear-type strain gauges was developed to measure the tension of a wire in a winch. A finite element analysis was performed to determine the locations of the strain gauges. All of the shear-type strain gauges were attached onto parts that undergo regularly shear stress distributions. A Wheatstone bridge circuit was used to connect each of the gauges and to measure the strains. Linearity within the 5% error range was noted when testing the pin-type load-cell.

• 한국전자파학회논문지
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• 제17권11호
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• pp.1105-1111
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• 2006

본 논문에서는 저온 소성 세라믹(LTCC)에 기초한 SiP 기술을 이용하여 60 GHz 무선 통신을 위한 송신기용 초소형 전력 증폭기 LTCC모듈을 설계 및 제작하여 그 특성을 측정하였다. 60 GHz대역에서 LTCC 다층 기판과 전력 증폭기 MMIC의 상호 연결 손실을 줄이기 위해 와이어 본드와 기판 사이의 천이를 최적화하였고, MMIC 집적을 위한 고 격리 구조를 제안하였다. 와이어 본드 천이의 경우, 와이어의 인덕턴스를 감소시키기 위해 매칭 회로의 설계와 와이어 상호간의 간격을 최적화하였다. 또한 상호 연결 불연속 효과로 인한 전계의 방사를 억제하기 위해 코프라나 와이어 본드 구조를 이용하였다. 고 격리 모듈 구조를 위하여, LTCC 기판 내부에 DC 전원 배선을 내장시키고 비아로 그 주위를 차폐를 시켰다. 5층의 LTCC 기판을 사용하여 제작된 전력 증폭기 LTCC모듈의 크기는 $4.6{\times}4.9{\times}0.5mm^3$이고, $60{\sim}65GHz$ 대역에서 이득과 P1dB 출력 전력은 각각 10 dB와 11 dBm이다.

• 한국초등과학교육학회지:초등과학교육
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• 제37권2호
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• pp.161-172
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• 2018

This study investigated the changes in representation on analogies that elementary science-gifted students generated by using Algodoo program to explain the electric current. After the students were taught about the 'components in circuit and their function' and 'electric current' with teacher centered analogy and PhET program for 4 class hours, they generated analogies to the electric circuit. Then they compared the similarity between generated analogy and target concept and matched it to the target concept. The result revealed that the battery, light bulb, and electric wire were changed according to the change of representations on free electrons. And they generated more proper analogies reflected the target concept when represented the free electrons by the circular particles than the water. From these results, we can say that generating analogy using Algodoo program is the effective education activity to help students understand abstract concept by visualizing it more easily and simply.

• 대한전자공학회논문지
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• 제24권4호
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• pp.708-712
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• 1987

This paper deals with minimizing layout area of VLSI design. A long wire in a VLSI layout causes delay which can be reduced by using a driver. There can be significant area increase when many drivers are introduced in a layout. This paper describes a method to obtain tight bound on the worst-case increase in area when drivers are introduced along many long wires in a layout. The area occupied by minimum-area embedding for a circuit can depend on the aspect ratio of the bounding rectangle of the layout. This paper presents a separator-based area optimal embeddings for VLSI graphs in rectangles of several aspect ratios.

• 한국초전도저온공학회:학술대회논문집
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• 한국초전도저온공학회 2000년도 KIASC Conference 2000 / 2000년도 학술대회 논문집
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• pp.29-32
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• 2000

Superconducting transmission cable is one of interesting part in power application using high temperature super-conducting wire as transformance. One important parameter in HTS cable design is transport current distribution because it is related with current transmission capacity and loss. In this paper, we present the calculation theory of current distribution for multi-layer cable using the electric circuit model and in example, calculation results of current distribution and AC loss in each layer of 4-layer HTS transmission cable.