• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.5
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• pp.36-41
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• 2007

We report the 94 GHz CPW branch-line bandpass filter for planar integrated millimeter-wave circuits. The branch-line coupler operates as a transversal filtering section by connecting the coupling ports to the open load stubs and taking the isolation port as the output node. For design of the 94 GHz branch-line bandpass filter, we built the CPW library and optimized the characteristic impedances and the lengths of the branch-line coupler and the open load stubs. The fabricated 94 GHz bandpass filter exhibits an insertion loss of 2.5 dB with an 11.7 % 3 dB relative bandwidth and the return loss is -18.5 dB at a center frequency of 94 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.3
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• pp.380-388
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• 2011

In this paper, we developed the X-band 63 watt pulsed SSPA(Solid State Power Amplifier) by using HMIC(Hybrid Microwave Integrated Circuits). The pulsed SSPA consists of power supply and 3-stage amplifier modules : pre-amplifier stage, driver-amplifier stage, final-amplifier stage. The developed pulsed SSPA provides more than 63 watts of output power with a short pulse width and the duty cycle of up to 1.2 % at $70^{\circ}C$. The fabricated module offers great than 37 dB of saturated gain across the operating band. Input and output VSWR is <1.5:1. This module has an average current of 400 mA typical and operates at a +28 $V_{dc}$ supply. The developed SSPA in this paper can apply to pulsed Doppler radar with high speed operation.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.4
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• pp.344-348
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• 2002

As microelectronics technology continues to progress, there is also a continuous demand on highly integration and miniaturization of systems. For example, it is desirable to package several integrated circuits together in multilayer structure, such as multichip modules, to achieve higher levels of compactness and higher performance. Passive components (i.e., capacitors, resistors, and inductors) are very important fort many MCM applications. In addition, the low-temperature co-fired ceramic (LTCC) process has considerable potential for embedding passive components in a small area at a low cost. In this paper, we investigate a method of statistically modeling integrated passive devices from just a small number of test structures. A set of LTCC inductors is fabricated and their scattering parameters (s-parameters) are measured for a range of frequencies from 50MHz to 5GHz. An accurate model for each test structure is obtained by using a building block based modeling methodology and circuit parameter optimization using the HSPICE circuit simulator.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.67 no.6
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• pp.745-752
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• 2018

ICs(Integrated circuits) for nuclear power plant exposed to radiation environment occur malfunctions and data errors by the TID(Total ionizing dose) effects among radiation-damage phenomenons. In order to protect ICs from the TID effects, this paper proposes a radiation-hardening of the logic circuit(D-latch) which used for the data synchronization and the clock division in the ICs design. The radiation-hardening technology in the logic device(NAND) that constitutes the proposed RH(Radiation-hardened) D-latch is structurally more advantageous than the conventional technologies in that it keeps the device characteristics of the commercial process. Because of this, the unit cell based design of the RH logic device is possible, which makes it easier to design RH ICs, including digital logic circuits, and reduce the time and cost required in RH circuit design. In this paper, we design and modeling the structure of RH D-latch based on commercial $0.35{\mu}m$ CMOS process using Silvaco's TCAD 3D tool. As a result of verifying the radiation characteristics by applying the radiation-damage M&S (Modeling&Simulation) technique, we have confirmed the radiation-damage of the standard D-latch and the RH performance of the proposed D-latch by the TID effects.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2000.11a
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• pp.216-219
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• 2000

A Ka Band 3-stage MMIC (Monolithic Microwave Integrated Circuits) LNA(Low Noise Amplifiers) has been designed. The MMIC LNA consists of two single-ended type amplication stapes and one balanced type amplication stage to satisfy noise figure characteristics and high gain and amplitude linearity. The 0.15um pHEMT has been used to provide a ultra low noise figure and high gain amplification. Series and Shunt feedback circuits were inserted to ensure high stability over frequency range of DC to 80 GHz. The size of designed MMIC LNA is 3100mm ${\times}$ 2400um(7.44$\textrm{mm}^2$). The on wafer measured noise figure of the MMIC LNA is less than 2.0 dB over frequency range of 22 GHz to 30 GHz.

• Proceedings of the KIEE Conference
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• 2004.07c
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• pp.2052-2054
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• 2004

The TX/RX broadband L-type circular polarization antenna using LTCC at K/Ka band has been presented. This antenna has been analyzed in compensation for LTCC with relative permittivity 5.2 and could have been integrated with RF component. As the measured 10dB impedance circular polarization bandwidth of the proposed antenna is 7%(20.8GHz${\sim}$22.2GHz) at the K band and 2.3%(30.9GHz to 31.6GHz) at the Ka band. Also the gain of the antenna is -0.7${\sim}$3.05dBi at the K band and -2.8${\sim}$1dBi at the Ka band. The purpose of the research is to design an efficient antenna structure for satellite communication at K/Ka band. the antenna should be used for both TX and RX frequency bands. The antenna will be mounted on LTCC(Low Temperature Co-fired Ceramic) so that it can be integrated with other RF circuits. This research is important because of the following reasons. 1) The frequency ranges of satellite communication tends to move up to higher frequency such as Ka band or milimeter wave band. 2) Design of antenna for smaller size, lighter weight and less loss is preferred by most RF engineers. 3) Antennas on LTCC enables to integrate the antenna with other RF circuits, and thus, one can reduce the size and loss of the RF system.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.82-82
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• 2008

One-dimensional (1D) nanowires have been received much attention due to their potential for applications in various field. Recently some logic applications fabricated on various nanowires, such as ZnO, CdS, Si, are reported. These logic circuits, which consist of two- or three field effect transistors(FETs), are basic components of computation machine such as central process unit (CPU). FETs fabricated on nanowire generally have surrounded shapes of gate structure, which improve the device performance. Highly integrated circuits can also be achieved by fabricating on nano-scaled nanowires. But the numerical and SPICE simulation about the logic circuitry have never been reported and analyses of detailed parameters related to performance, such as channel doping, gate shapes, souce/drain contact and etc., were strongly needed. In our study, NAND and NOT logic circuits were simulated and characterized using 2- and 3-dimensional numerical simulation (SILVACO ATLAS) and built-in spice module(mixed mode).

• Journal of the Korean institute of surface engineering
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• v.56 no.3
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• pp.180-184
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• 2023

Scholars have proposed wafer-level bonding and three-dimensional (3D) stacked integrated circuit (IC) and have investigated Cu-Cu bonding to overcome the limitation of Moore's law. However, information about quantitative Cu-Cu direct-bonding conditions, such as temperature, pressure, and interfacial adhesion energy, is scant. This study determines the optimal temperature and pressure for Cu-Cu bonding by varying the bonding temperature to 100, 150, 200, 250, and 350 ℃ and pressure to 2,303 and 3,087 N/cm². Various conditions and methods for surface treatment were performed to prevent oxidation of the surface of the sample and remove organic compounds in Cu direct bonding as variables of temperature and pressure. EDX experiments were conducted to confirm chemical information on the bonding characteristics between the substrate and Cu to confirm the bonding mechanism between the substrate and Cu. In addition, after the combination with the change of temperature and pressure variables, UTM measurement was performed to investigate the bond force between the substrate and Cu, and it was confirmed that the bond force increased proportionally as the temperature and pressure increased.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.4A
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• pp.350-357
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• 2005

DSRC provides high speed radio link between Road Side Equipment and On-Board Equipment within the narrow communication area. In this paper, a 5.8 GHz up-conversion mixer for DSRC communication system was designed and fabricated using 0.8 m SiGe HBT process technology and IF/LO/RF matching circuits, IF/LO input balun circuits, and RP output balun circuit were all integrated on chip. The chip size of fabricated mixer was $2.7mm\times1.6mm$ and the measured performance was 3.5 dB conversion gain, -12.5 dBm output IP3, 42 dB LO to If isolation, 38 dB LO to RF isolation, current consumption of 29 mA for 3.0 V supply voltage.

• ETRI Journal
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• v.31 no.3
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• pp.247-253
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• 2009

We propose a Ku-band driver and high-power amplifier monolithic microwave integrated circuits (MMICs) employing a compensating gate bias circuit using a commercial 0.5 ${\mu}m$ GaAs pHEMT technology. The integrated gate bias circuit provides compensation for the threshold voltage and temperature variations as well as independence of the supply voltage variations. A fabricated two-stage Ku-band driver amplifier MMIC exhibits a typical output power of 30.5 dBm and power-added efficiency (PAE) of 37% over a 13.5 GHz to 15.0 GHz frequency band, while a fabricated three-stage Ku-band high-power amplifier MMIC exhibits a maximum saturated output power of 39.25 dBm (8.4 W) and PAE of 22.7% at 14.5 GHz.