• 제목/요약/키워드: 3D Thermal Information

검색결과 167건 처리시간 0.023초

Dense Thermal 3D Point Cloud Generation of Building Envelope by Drone-based Photogrammetry

  • Jo, Hyeon Jeong;Jang, Yeong Jae;Lee, Jae Wang;Oh, Jae Hong
    • 한국측량학회지
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    • 제39권2호
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    • pp.73-79
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    • 2021
  • Recently there are growing interests on the energy conservation and emission reduction. In the fields of architecture and civil engineering, the energy monitoring of structures is required to response the energy issues. In perspective of thermal monitoring, thermal images gains popularity for their rich visual information. With the rapid development of the drone platform, aerial thermal images acquired using drone can be used to monitor not only a part of structure, but wider coverage. In addition, the stereo photogrammetric process is expected to generate 3D point cloud with thermal information. However thermal images show very poor in resolution with narrow field of view that limit the use of drone-based thermal photogrammety. In the study, we aimed to generate 3D thermal point cloud using visible and thermal images. The visible images show high spatial resolution being able to generate precise and dense point clouds. Then we extract thermal information from thermal images to assign them onto the point clouds by precisely establishing photogrammetric collinearity between the point clouds and thermal images. From the experiment, we successfully generate dense 3D thermal point cloud showing 3D thermal distribution over the building structure.

A Study of 3D Design Data Extraction for Thermal Forming Information

  • Kim, Jung;Park, Jung-Seo;Jo, Ye-Hyan;Shin, Jong-Gye;Kim, Won-Don;Ko, Kwang-Hee
    • Journal of Ship and Ocean Technology
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    • 제12권3호
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    • pp.1-13
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    • 2008
  • In shipbuilding, diverse manufacturing techniques for automation have been developed and used in practice. Among them, however, the hull forming automation is the one that has not been of major concern compared with others such as welding and cutting. The basis of the development of this process is to find out how to extract thermal forming information. There exist various methods to obtain such information and the 3D design shape that needs to be formed should be extracted first for getting the necessary thermal forming information. Except well-established shipyards which operate 3D design systems, most of the shipyards only rely on 2.5D design systems and do not have an easy way to obtain 3D surface design data. So in this study, various shipbuilding design systems used by shipyards are investigated and a 3D design surface data extraction method is proposed from those design systems. Then an example is presented to show the extraction of real 3D surface data using the proposed method and computation of thermal forming information using the data.

3D NoC 구조에서 성능을 고려한 어댑티브 수직 스로틀링 기반 동적 열관리 기법 (Performance-aware Dynamic Thermal Management by Adaptive Vertical Throttling in 3D Network-on-Chip)

  • 황준선;한태희
    • 전자공학회논문지
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    • 제51권7호
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    • pp.103-110
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    • 2014
  • 최근 등장한 TSV(Through Silicon Via)기반의 3D 적층 기술은 보다 강력한 발열관리 기법을 필요로 하며 냉각 비용과 폼팩터(form factor)의 제한을 고려했을 때 소프트웨어적인 열관리 기법의 중요성이 더욱 강조되고 있다. 이러한 접근 방식의 유력한 후보 중 하나로 제시되었던 스로틀링을 통한 열관리 기법의 경우, 증가하는 버스 점유율로 인해 전체적인 성능저하를 야기하는 문제점이 있다. 본 논문에서는 향후 TSV 기반 3D SoC의 커뮤니케이션 병목 현상을 해결하기 위한 3D 네트워크-온-칩 (Network-on-Chip, NoC) 구조에서 어댑티브 스로틀링 기법을 제안하여, 열관리와 더불어 온-칩 네트워크상의 트래픽 감소를 통해 전체적인 성능향상을 목표로 한다. 본 논문에서는 실험을 통하여 기존의 방식에 비하여 스로틀링으로 인해 저하된 처리량이 최소경로 라우팅 시 최대 72% 향상됨을 알 수 있었다.

Cooling and Deformation Analysis of a Layered Road in a FDM Type 3D Printing Through Thermal-structural Coupled Simulation

  • Kim, S.L.;Lyu, M.Y.
    • Elastomers and Composites
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    • 제52권3호
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    • pp.216-223
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    • 2017
  • The additive manufacturing technology, also called 3D printing, is growing fast. There are several methods for 3D printing. Fused deposition modeling (FDM) type 3D printing is the most popular method because it is simple and inexpensive. Moreover, it can be used for printing various thermoplastic materials. However, it contains the cooling of layered road and causes thermal shrinkage. Thermal shrinkage should be controlled to obtain high-quality products. In this study, temperature distribution and cooling behavior of a layered road with cooling are studied through computer simulation. The thermal shrinkage of the layered road was simulated using the calculated temperature distribution with time. Shape variation of the layered road was predicted as cooling proceeded. Stress between the bed and the layered road was also predicted.This stress was considered as the detaching stress of the layered road from the bed. The simulations were performed for various thermal conductivities and temperatures of the layered road, bed temperature, and chamber temperature of a 3D printer. The simulation results provide detailed information about the layered road for FDM type 3D printing under operational conditions.

Quantifying Architectural Impact of Liquid Cooling for 3D Multi-Core Processors

  • Jang, Hyung-Beom;Yoon, Ik-Roh;Kim, Cheol-Hong;Shin, Seung-Won;Chung, Sung-Woo
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제12권3호
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    • pp.297-312
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    • 2012
  • For future multi-core processors, 3D integration is regarded as one of the most promising techniques since it improves performance and reduces power consumption by decreasing global wire length. However, 3D integration causes serious thermal problems since the closer proximity of heat generating dies makes existing thermal hotspots more severe. Conventional air cooling schemes are not enough for 3D multi-core processors due to the limit of the heat dissipation capability. Without more efficient cooling methods such as liquid cooling, the performance of 3D multi-core processors should be degraded by dynamic thermal management. In this paper, we examine the architectural impact of cooling methods on the 3D multi-core processor to find potential benefits of liquid cooling. We first investigate the thermal behavior and compare the performance of two different cooling schemes. We also evaluate the leakage power consumption and lifetime reliability depending on the temperature in the 3D multi-core processor.

동적 주파수 조절 기법을 적용한 3D 구조 멀티코어 프로세서의 온도 분석 (Thermal Analysis of 3D Multi-core Processors with Dynamic Frequency Scaling)

  • 증민;박영진;이병석;이정아;김철홍
    • 한국컴퓨터정보학회논문지
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    • 제15권11호
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    • pp.1-9
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    • 2010
  • 집적회로 공정기술이 급속도로 발달하면서 멀티코어 프로세서를 설계하는데 있어서 내부 연결망 (interconnection)은 성능 향상을 방해하는 주요 원인이 되고 있다. 멀티코어 프로세서의 내부 연결망에서 발생하는 병목 (bottleneck) 현상을 해결하기 위한 방안으로 최근에는 2D 평면 구조에서 3D 적층 구조로 설계 방식을 변경하는 기법이 주목을 받고 있다. 3D 구조는 칩 내부의 와이어 길이를 크게 감소시킴으로써 성능 향상과 전력 소모 감소의 큰 이점을 가져오지만, 전력 밀도 증가로 인한 온도 상승의 문제를 발생시킨다. 따라서 효율적인 3D 구조 멀티코어 프로세서를 설계하기 위해서는 내부의 온도 문제를 해결할 수 있는 설계 기법이 우선적으로 고려되어야 한다. 본 논문에서는 실험을 통해 다양한 측면에서 3D 구조 멀티코어 프로세서 내부의 온도 분포를 분석하고자 한다. 3D 구조 멀티코어 프로세서에서 수행되는 프로그램의 특성, 냉각 효과, 동적 주파수 조절 기법 적용에 따른 각 코어의 온도 분포를 상세하게 분석함으로써 저온도 3D 구조 멀티코어 프로세서 설계를 위한 가이드라인을 제시하고자 한다. 실험 결과, 3D 구조 멀티코어 프로세서의 온도를 효과적으로 관리하기 위해서는 더 높은 냉각 효과를 갖는 코어를 상대적으로 더 높은 동작 주파수로 작동 시켜야 하고 온도에 영향을 많이 주는 작업 또한 더 높은 냉각 효과를 갖는 코어에 할당해야 함을 알 수 있다.

Numerical analysis of the thermal behaviors of cellular concrete

  • She, Wei;Zhao, Guotang;Yang, Guotao;Jiang, Jinyang;Cao, Xiaoyu;Du, Yi
    • Computers and Concrete
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    • 제18권3호
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    • pp.319-336
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    • 2016
  • In this study, both two- and three-dimensional (2D and 3D) finite-volume-based models were developed to analyze the heat transfer mechanisms through the porous structures of cellular concretes under steady-state heat transfer conditions and to investigate the differences between the 2D and 3D modeling results. The 2D and 3D reconstructed pore networks were generated from the microstructural information measured by 3D images captured by X-ray computerized tomography (X-CT). The computed effective thermal conductivities based on the 2D and 3D calculations performed on the reconstructed porous structures were found to be nearly identical to those evaluated from the 2D cross-sectional images and the 3D X-CT images, respectively. In addition, the 3D computed effective thermal conductivity was found to agree better with the measured values, in comparison with the 2D reconstruction and real cross-sectional images. Finally, the thermal conductivities computed for different reconstructed porous 3D structures of cellular concretes were compared with those obtained from 2D computations performed on 2D reconstructed structures. This comparison revealed the differences between 2D and 3D image-based modeling. A correlation was thus derived between the results of the 3D and 2D models.

Improvement on the Laminated Busbar of NPC Three-Level Inverters based on a Supersymmetric Mirror Circulation 3D Cubical Thermal Model

  • He, Feng-You;Xu, Shi-Zhou;Geng, Cheng-Fei
    • Journal of Power Electronics
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    • 제16권6호
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    • pp.2085-2098
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    • 2016
  • Laminated busbars with a low stray inductance are widely used in NPC three-level inverters, even though some of them have poor performances in heat equilibrium and overvoltage suppression. Therefore, a theoretical method is in need to establish an accurate mathematical model of laminated busbars and to calculate the impedance and stray inductance of each commutation loop to improve the heat equilibrium and overvoltage suppression performance. Firstly, an equivalent circuit of a NPC three-level inverter laminated busbar was built with an analysis of the commutation processes. Secondly, on the basis of a 3D (three dimensional) cubical thermal model and mirror circulation theory, a supersymmetric mirror circulation 3D cubical thermal model was built. Based on this, the laminated busbar was decomposed in 3D space to calculate the equivalent resistance and stray inductance in each commutation loop. Finally, the model and analysis results were put into a busbar design, simulation and experiments, whose results demonstrate the accuracy and feasibility of the proposed method.

개선된 선형성과 해상도를 가진 10비트 전류 출력형 디지털-아날로그 변환기의 설계 (Monolithic and Resolution with design of 10bit Current output Type Digital-to-Analog Converter)

  • 송준계;신건순
    • 한국정보통신학회:학술대회논문집
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    • 한국해양정보통신학회 2007년도 추계종합학술대회
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    • pp.187-191
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    • 2007
  • 본 논문은 상위 7비트와 하위3비트의 binary-thermal decoding 방식과 segmented 전류원 구조로서 전력소모, 선형성 및 글리치 에너지등 주요 사양을 고려하여, 3.3V 10비트 CMOS D/A 변환기를 제안한다. 동적 성능을 향상 시키기위해 출력단에 return-to-zero 회로를 사용하였고, segmented 전류원 구조와 최적화 된 binary-thermal decoding 방식으로 D/A변환기가 가질 수 있는 장점은 디코딩 논리회로의 복잡성을 단순화 함으로 칩면적을 줄일 수 있다. 제안된 변환기는 $0.35{\mu}m$ CMOS n-well 표준공정을 이용한다. 설계된 회로의 상승/하강시간, 정착시간, 및 INL/DNL은 각각 1.90/2.0ns, 12.79ns, ${\pm}2.5/{\pm}0.7$ LSB로 나타난다. 또한 설계된 D/A 변환기는 3.3V의 공급전원에서는 250mW의 전력소모가 측정 된다.

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고해상도를 위한 DAC 오차 보정법을 가진 10-비트 전류 출력형 디지털-아날로그 변환기 설계 (A Design of 10bit current output Type Digital-to-Analog converter with self-Calibration Techique for high Resolution)

  • 송준계;신건순
    • 한국정보통신학회논문지
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    • 제12권4호
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    • pp.691-698
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    • 2008
  • 본 논문은 상위 7-비트와 하위3-비트의 binary-thermal decoding 방식과 segmented 전류원 구조로서 전력소모, 선형성 및 글리치 에너지 등 주요 사양을 고려하여, 3.3V 10비트 CMOS D/A 변환기를 제안한다. 동적 성능을 향상 시키기위해 출력단에 return-to-zero 회로를 사용하였고, segmented 전류원 구조와 최적화 된 binary-thermal decoding 방식으로 D/A 변환기가 가질 수 있는 장점은 디코딩 논리 회로의 복잡성을 단순화함으로 칩면적을 줄일 수 있다. 제안된 변환기는 $0.35{\mu}m$ CMOS n-well 표준공정을 이용한다. 설계된 회로의 상승/하강시간, 정착시간, 및 INL/DNL은 각각 1.90/2.0ns, 12.79ns, ${\pm}2.5/{\pm}0.7\;LSB$로 나타난다. 또한 설계된 D/A 변환기는 3.3V의 공급전원에서는 250mW의 전력소모가 측정된다.