• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.1
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• pp.1-7
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• 2007

An MTJ element not only computes Boolean function but also stores the output result in itself. We can make the most use of magneto-logic's merits by employing the magneto-logic in substitution for the sequential logic as well as the combinational logic. This unique feature opens a new horizon for potential application of MTJ as a universal logic element. Magneto-logic circuits using MTJ elements are more integrative and non-volatile. This paper presents novel 3-bit magneto-logic up/down counters and presents simulation results based on the HSPICE macro-model of MTJ that we have developed.

• Journal of IKEEE
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• v.24 no.1
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• pp.132-139
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• 2020

The ionizer module used in this air cleaner supplies high voltages of 3.5KV / -4KV to the discharge electrode HV+ / HV- using a winding transformer to generate positive and negative ions by electric field radiation of carbon fiber brush. The ionizer module circuit using the existing MCU has the disadvantage of large PCB size and expensive price, and the gate driver chip using the existing ring oscillator has oscillation period sensitive to PVT (Process-Voltage-Temperature) fluctuation and there is risk of fire or electric shock because there is no fault detection function by short circuit of HV+ and GND as well as HV- and GND. Therefore, in this paper, even though PVT fluctuates, by using 7-bit binary up counter, HV+ voltage reaches the target voltage by adjusting oscillation period. And an HV+ short fault detection circuit for detecting a short circuit between HV+ and GND, an HV- short fault detection circuit for detecting a short circuit between HV- and GND, and an OVP (Over-Voltage Protection) for detecting that HV+ rises above an overvoltage are newly proposed.

• Journal of the Korea Society of Computer and Information
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• v.8 no.3
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• pp.34-39
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• 2003

There have been several researches to trace intruders on the Internet. But, up to now, few of them has shown a satisfactory and practicable result of the study. Recently, a little bit more active methods such as 'counter-attacking' have been considered to be an alternative to solve the problem of hacking, and some people showed a tendency to accept the method as one possible way to protect their systems. And the new intruder-retracing method suggested in this study is an improved AIAA(Autonomous Intrusion Analysis Agent) model which has been achieved by attaching the counter-attacking method to the existing tracing system. In this paper, the automatic intruder-tracking system is proposed, which was achieved through the design of the following three modules, such as the intruder-retracing module, intruder-tracing module and AIAA dispatch module.

• Journal of IKEEE
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• v.24 no.4
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• pp.1074-1080
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• 2020

This paper proposes a digitally controlled buck converter insensitive to process, voltage and temperature and capable of three modes of operation depending on the state of the output voltage. Conventional digital-controlled buck converters utilized A/D converters, counters and delay line circuits for accurate output voltage control, resulting in increasing the number of counter and delay line bits. This problem can be resolved by employing the 8-bit and 16-bit bidirectional shift registers, and this design technique leads a buck converter to be able to control duty ratio up to 128-bit resolution. The proposed buck converter was designed and fabricated with a CMOS 180 nano-meter 1-poly 6-metal process, generating an output voltage of 0.9 to 1.8V with the input voltage range of 2.7V to 3.6V, a ripple voltage of 30mV, and a power efficiency of up to 92.3%. The transient response speed of the proposed circuit was measured to be 4us.

• Journal of IKEEE
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• v.2 no.1 s.2
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• pp.34-41
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• 1998

An integrated circuit for magnetic stripe storage system is implemented. All the analog and digital circuits are integrated in one chip. The analog block contains preamplifier, peak detecter, comparator and reference generater. And digital block includes reference window signal generater, up/down counter for F/2F signal measurement, bit-error detection logic, and control logic. Both the encoding and decoding functions for F/2F signal processing are provided. An AGC(automatic gain control) circuit which was included in conventional circuits is eliminated due to optimized circuit design. Misreading prevention circuits are also proposed by fixing up new reference bit when broken bits are detected. The prototype chip is implemented using $0.8{\mu}m$ N-well CMOS technology and operates from 3.3 V to 7.5 V of supply voltage. It occupies a die area of $3.04mm^2(1.6mm{\times}1.9mm)$ and dissipates 8 mW with a 5 V supply voltage.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.3
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• pp.293-299
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• 2016

Recently, as IoT (Internet of Things) becomes more important, low cost implementation of sensor nodes also becomes critical issues for two well-known standards, IEEE 802.15.4 and IEEE 802.15.6 which stands for WPAN (Wireless Personal Area Network) and WBAN (Wireless Body Area Network), respectively. This paper presents the area-optimized AES-CCM (Advanced Encryption Standard - Counter with CBC-MAC) hardware security engine which can support both IEEE 802.15.4 and IEEE 802.15.6 standards. First, for the low cost design, we propose the 8-bit AES encryption core with the S-box that consists of fully combinational logic based on composite field arithmetic. We also exploit the toggle method to reduce the complexity of design further by reusing the AES core for performing two operation mode of AES-CCM. The implementation results show that the total gate count of proposed AES-CCM security engine can be reduced by up to 42.5% compared to the conventional design.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.11 s.353
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• pp.69-76
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• 2006

This paper proposes a self-repair system which is able to self-repair in cell unit by imitating the structure of living beings. Because the data of artificial cells move even diagonally, our system can self-repair faults not in column unit, but in cell unit. It leads to design an efficient self-repair system for multiple faults. Moreover, in artificial cell design, the usage of logic-based design method has smaller system size than that of the previous register-based design method. Our experimental result for 2-bit up/down counter shows 40.3% reduction in hardware overhead, compared to the previous method [6].