• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.1
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• pp.69-75
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• 2010

In this paper, with using the clapp type VCO(Voltage Controlled Osillator) configuration a wideband frequency synthesizer in UHF band is proposed. In order to design a wideband frequency synthesizer, the variation of phase in the negative resistance circuit as well as the load circuit was analyzed. Based on this result we propose a method to widen the operation range of the VCO. A frequency synthesizer using the proposed wideband VCO was designed and fabricated. It is shown that the synthesizer has the operating frequency range of 740~1,530 MHz by 0~5 V varactor tuning voltage, and it had the output power of 2~-6 dBm. Moreover, the phase noise measured as -77 dBc/Hz at 10 kHz offset, and as -108 dBc/Hz at 100 kHz offset from the oscillation frequency.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.11
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• pp.16-23
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• 2009

A 12b 10MS/s pipelined ADC with low DC gain amplifiers is presented. The pipelined ADC using a reference scaling technique is proposed to compensate the gain error in MDACs due to a low DC gain amplifier. To minimize the performance degradation of the ADC due to amplifier offset, the proposed offset trimming circuit is employed m the first-stage MDAC amplifier. Additional reset switches are used in all MDACs to reduce the memory effect caused by the low DC gain amplifier. The measured differential and integral non-linearities of the prototype ADC with 45dB DC gain amplifiers are less than 0.7LSB and 3.1LSB, respectively. The prototype ADC is fabricated in a $0.35{\mu}m$ CMOS process and achieves 62dB SNDR and 72dB SFDR with 2.4V supply and 10MHz sampling frequency while consuming 19mW power.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.12
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• pp.83-89
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• 2014

A ku-band complementary cross-coupled differential voltage controlled oscillator is designed, measured and fabricated using $0.18-{\mu}m$ CMOS technology. A 2.4GHz of very wide frequency tuning at oscillating frequency of 14.5GHz is achieved with presented circuit topology and MOS varactors. Measurement results show -1.66dBm output power with 18mA DC current drive from 3.3V power supply. When 5V is applied, the output power is increased to 0.84dBm with 47mA DC current. -74.5dBc/Hz phase noise at 100kHz offset is measured. The die area is $1.02mm{\times}0.66mm$.

• The Journal of Korean Institute of Information Technology
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• v.17 no.3
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• pp.43-50
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• 2019

In this paper, we propose a S-band oscillator with a reduced electrical size by applying a vertical split ring resonator(VSRR). The VSRR is a type of split ring resonator that operates as a resonator by the capacitance and inductance generated between the microstrip lines arranged on the top and bottom of the dielectric substrate and it has an advantage that the electrical size of the resonance circuit can be reduced as compared with the conventional ring resonator. In this paper, we design a VSRR operating over S-band and an oscillator using the VSRR as the resonant circuit. The proposed oscillator showed the output of 5.9dBm at 2.4HGz and showed the phase noise characteristics of -112.58dBc at 100KHz offset frequency and -117.85dBc at 1MHz offset.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.34S no.11
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• pp.16-24
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• 1997

In order to prevent the presence of the residual phase difference at the discriminator output by the existing AFC techniques, we propose a new automatic frequency control(AFC) tracking algorithm for QPSK demodulation at the digital direct broadcasting satellite(DBS) receiver, which we call a rotational decision-directed AFC(RDDAFC). The RDDAFC rotates the decision boundary for the kth received symbol by the frequency deterctor output of the (k-1)th received symbol. Tracking performances of carrier frequency offset by the proposed RDDAFC algorithm are evaluated through computer simulations under the practical DBS channel conditions with a carrier frequency offset of 2.3MHz when S/N equals 2dB. Test results show that the total pull-in time of the RDDAFC is 1.697msec for 10$^{-3}$ SER before forwared error correction at the receiver.

• Journal of the Korean Society for Precision Engineering
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• v.10 no.2
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• pp.48-53
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• 1993

At present, the manufacturing industry is in a process of a great change. There is a demand for a variety of types and shorter product life. The change increases the number of different tools and frequencies of tool changes. For the most part, the tools are presetted and offset values are entered manually or via punched tapes to NC machines. Thus a large amount of capital is tied up in the tool area and considerable productive time is lost. Consequently, there is a need for improvement in tool management. This paper describes a computer controlled tool data management system which include: 1) tool identification with bar code. 2) computer aided management and updating of tool data. 3) tool data communication with tool presetter, CNC, etc.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.7
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• pp.1652-1656
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• 2014

In this work, we demonstrated a 77 GHz waveguide VCO with transition from WR-12 to WR-10 for anti-collision radar applications. The fabricated waveguide VCO consists of a GaAs-based Gunn diode, a varactor diode, a waveguide transition, and two bias posts for operating as a LPF and a resonator. The cavity is designed for fundamental mode at 38.5 GHz and operated at second hormonic of 77 GHz. The waveguide transition has a 1.86 dB of insertion loss and -30.22 dB of S11 at the center frequency of 77 GHz. The fabricated VCO achieves an oscillation bandwidth of 870 MHz. Output power is from 12.0 to 13.75 dBm and phase noise is -100.78 dBc/Hz at 1 MHz offset frequency from the carrier.

• Geomechanics and Engineering
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• v.21 no.2
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• pp.111-122
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• 2020

In most cases in urban areas, construction of divergence tunnel should take into account proximity to existing tunnel in operation. This inevitably leads to deformation of adjacent structures and surrounding ground. Preceding researches mainly dealt with reinforcing of the diverging section for the stability including the pillar. This has limitations in investigating the interactive effects between existing structures and surrounding ground due to the excavation of the divergence tunnel. In this study, the complex interactive behavior of pile, the operating tunnel, and the surrounding ground according to horizontal offsets between the two adjacent tunnels was quantitatively analyzed based on conditions diverged from operating tunnel in urban areas. The effects on ground structures confirmed by analyzing the ground surface settlements, pile settlements, and the axial forces of the pile. The axial forces of lining in operating tunnel investigated to estimate their impact on existing tunnel. In addition, in order to identify the deformation of the surrounding ground, the close range photogrammetry applied to the laboratory model test for confirming the underground displacements. Two-dimensional finite element numerical analysis was also performed and compared with the results. It identified that the impact of excavating a divergence tunnel decreased as the horizontal offset increased. In particular, when the horizontal offset was larger than 1.0D (D is the diameter of operating tunnel), the impact on existing structures further reduced and the deformation of surrounding ground was concentrated at the top of the divergence tunnel.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.11
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• pp.1806-1812
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• 2016

We propose an interior permanent magnet syhchronous motor (IPMSM) with arc-shape ferrite permanent magnets (PMs) as a substitute for the rare-earth permanent magnet, and determine its optimal design through parametric study. First, we use 2D finite element analysis to analyze 4-poles and 6-slots initial model according to performance requirements and design parameters. The current angle of the maximum average torque considered in the analysis is different compared with the current angle of the minimum torque ripple. Thus, the parametric study for optimal rotor design is performed by varying the thickness and the offset radius of the PMs according to current angle. In particular, a narrow bridge is required in conventional IPMSM for reducing flux leakage; however, the increase in cogging torque in the analysis model saturates the narrow bridge (large offset radius). Therefore, we suggest an appropriate shape considering limiting conditions such as DC link voltage, average torque, torque ripple, and cogging torque taking into account performance requirements.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.3
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• pp.179-192
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• 2008

A multiphase compensation method with mismatch linearization technique, is presented and demonstrated in a $\Sigma-\Delta$ fractional-N frequency synthesizer. An on-chip delay-locked loop (DLL) and a proposed delay line structure are constructed to provide multiphase compensation on $\Sigma-\Delta$ quantizetion noise. In the delay line structure, dynamic element matching (DEM) techniques are employed for mismatch linearization. The proposed $\Sigma-\Delta$ fractional-N frequency synthesizer is fabricated in a $0.18-{\mu}m$ CMOS technology with 2.14-GHz output frequency and 4-Hz resolution. The die size is 0.92 mm$\times$1.15 mm, and it consumes 27.2 mW. In-band phase noise of -82 dBc/Hz at 10 kHz offset and out-of-band phase noise of -103 dBc/Hz at 1 MHz offset are measured with a loop bandwidth of 200 kHz. The settling time is shorter than $25{\mu}s$.