• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.24 no.1
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• pp.103-107
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• 2024

This paper is a study on a triangle patch antenna using a rectangle slot and strip conductor. The length and spacing of the slot were adjusted to confirm the characteristics of the triangle patch antenna with rectangle slot, and the area and shape of the radiation patch were changed to triangle, rectangle, and hexagon for impedance matching. The HFSS simulator was used to check the antenna parameter characteristics, and the antenna size was 26 mm ×26 mm. In this proposed antenna, the simulation frequency range with VSWR of 2 or less was 5.27 to 6.24 GHz. The bandwidth was 970 MHz. The frequency range of the fabricated antenna was 5.24 to 6.38 GHz, and the bandwidth 1140 MHz. The maximum radiation gain is 5.01 dBi. It was confirmed that all radiation patterns had directional characteristics.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.8
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• pp.827-833
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• 2002

In this paper, a microstrip array antenna for LMDS(Local Multipoint Distribution Service) receiver with corporate feeding network using Chebyshev polynomials is proposed to get the high gain and low side lobe level. The Chebyshev array method is proposed to design the corporate feeding network. LMDS uses 24~27 GHz microwave frequency band to send and receive broadband signals. Measured antenna shows 23.4 dBi gain, 24.96 GHz center frequency, -29.15 dB return loss and 1.2 GHz bandwidth.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.10a
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• pp.411-415
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• 2003

In this paper, a reflector type frequency doubler for local oscillator at 24GHz is designed and fabricated with ne71300-N MESFET. Optimum source and load impedances are decided through a multiharmonic load pull simulation technique. A conversion gain ran be improved using the reflector and fundamental and third harmonics are well suppressed with open stub of λ/4 length. Measured results show output power at 0dBm of input power is -3.776dBm, conversion gain 0.736dB, harmonic suppression 41.064dBc, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.10
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• pp.758-765
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• 2018

This paper presents a 24-GHz frequency-modulated continuous wave(FMCW) radar transceiver with two Rx and one Tx channels in 65-nm complementary metal-oxide-semiconductor(CMOS) process and implemented it on a radar system using the developed transceiver chip. The transceiver chip includes a $14{\times}$ frequency multiplier, low-noise amplifier, down-conversion mixer, and power amplifier(PA). The transmitter achieves >10 dBm output power from 23.8 to 24.36 GHz and the phase noise is -97.3 GHz/Hz at a 1-MHz offset. The receiver achieves 25.2 dB conversion gain and output $P_{1dB}$ of -31.7 dBm. The transceiver consumes 295 mW of power and occupies an area of $1.63{\times}1.6mm^2$. The radar system is fabricated on a low-loss Duroid printed circuit board(PCB) stacked on the low-cost FR4 PCBs. The chip and antenna are placed on the Duroid PCB with interconnects and bias, gain blocks and FMCW signal-generating circuitry are mounted on the FR4 PCB. The transmit antenna is a $4{\times}4$ patch array with 14.76 dBi gain and receiving antennas are two $4{\times}2$ patch antennas with a gain of 11.77 dBi. The operation of the radar is evaluated and confirmed by detecting the range and azimuthal angle of the corner reflectors.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2018.05a
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• pp.439-440
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• 2018

본 논문에서는 차량용 레이더를 위한 저 위상잡음 24GHz CMOS 전압제어발진기를 제안한다. 이러한 회로는 1.8볼트 전원에서 동작하며, 낮은 위상잡음을 가지도록 설계되어 있다. 제안한 회로는 TSMC $0.13{\mu}m$ 고주파 CMOS 공정으로 구현되어 있다. 제안한 회로는 최근 발표된 연구결과에 비해 저 전력동작에서 저 위상잡음 및 낮은 잡음지수 특성을 보였다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.10a
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• pp.304-308
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• 2003

In this paper, two-stage low noise amplifier(LNA) for 24GHz is designed and fabricated using NE450284C HJ-FET of NEC CO. In order to get noise figure and input VSWR to be wanted, it is considered input VSWR and noise figure simultaneously in matching-circuit designing. The fabricated two-stage low noise amplifier has the gain of 16.6dB, input VSWR of 1.6, and output VSWR under 1.5.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.10a
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• pp.66-70
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• 2003

In this paper a plannar singly balanced diode Miter for 24GHz band application is designed and implemented using a microstrip line and two schottky barrier beam lead mixer diodes. The implemented mixer have a conversion loss of 6 [dB], LO/RF isolation of 23 [dB], input 1dB compression point of 4 [dBm]. this diode mixer would be useful for homedyne radar.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.647-648
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• 2016

본 논문에서는 차량용 레이더를 위한 저 전력 24GHz CMOS 저 잡음 증폭기를 제안한다. 이러한 회로는 1.8볼트 전원에서 동작하며, 저 전력에서도 높은 전압 이득과 낮은 잡음지수를 가지도록 설계되어 있다. 제안한 회로는 TSMC $0.13{\mu}m$ 고주파 CMOS 공정으로 구현되어 있다. 제안한 회로는 최근 발표된 연구결과에 비해 저 전력동작에서 높은 전압이득 및 낮은 잡음지수 특성을 보였다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.1
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• pp.117-122
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• 2016

In this paper, we propose 24-GHz CMOS radio frequency (RF) power amplifier for short-range automotive collision avoidance radars. This circuit contains common source stage with inter-stages conjugate matching circuit as a class-A mode amplifier. The proposed circuit is designed using TSMC $0.13-{\mu}m$ mixed signal/RF CMOS process ($f_T/f_{MAX}=120/140GHz$). It operates at the supply voltage of 2V, and it is designed to have high power gain, low insertion loss and low noise figure in the low supply voltage. To reduce total chip area, the circuit used transmission lines instead of the bulky real inductor. The designed CMOS power amplifier showed the smallest chip size of $0.1mm^2$, the lowest power consumption of 40mW, the highest power gain of 26.5dB, the highest saturated output power of 19.2dBm and the highest maximum power-added efficiency of 17.2% as compared to recently reported results.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.10
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• pp.941-944
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• 2016

This paper proposes 24 GHz power amplifier for automotive collision avoidance and surveillance short range radar using Samsung 65-nm CMOS process. The proposed circuit has a 2-stage differential power amplifier which includes common source structure and transformer for single to differential conversion, impedance matching, and power combining. The measurement results show 15.5 dB maximum voltage gain and 3.6 GHz 3 dB bandwidth. The measured maximum output power is 13.1 dBm, input $P1_{dB}$ is -4.72 dBm, output $P1_{dB}$ is 9.78 dBm, and maximum power efficiency is 17.7 %. The power amplifier consumes 74 mW DC power from 1.2 V supply voltage.