• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.12
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• pp.1044-1049
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• 2015

In this paper, isolation enhanced antenna using isolating resonator was proposed. Two loop type antennas were designed to operate at Wi-Fi band(2.4~2.5 GHz), in symmetry to the center, and are closely located to each other. In order to enhance isolation characteristics at Wi-Fi bands, isolating resonator was designed between the two loop type antennas. The proposed isolating resonator is a slot type antenna that enhances isolation with the control of the size, and by adjusting the value of capacitor($C_D$) the resonant frequency of the isolating resonator can easily be adjusted to enhance isolation characteristic at the target frequency.

• Journal of Korea Multimedia Society
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• v.14 no.5
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• pp.614-621
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• 2011

This paper presents design of a wide tuning range digitally controlled oscillator(DCO) for Mobile-DTV applications. DCO is the key element of the ADPLL block that generates oscillation frequencies. We proposed a binary delay chain(BDC) structure, for wide tuning range DCO, modifying conventional fixed delay chain. The proposed structure generates oscillation frequencies by delay cell combination which has a variable delay time of $2^i$ in the range of $0{\leq}i{\leq}n-1$. The BOC structure can reduce the number of delay cells because it make possible to select delay cell and resolution. We simulated the proposed DCO by Cadence's Spectre RF tool in 1.8V chartered $0.18{\mu}m$ CMOS process. The simulation results showed 77MHz~2.07GHz frequency range and 3ps resolution. The phase noise yields -101dBc/Hz@1MHz at Mobile-DTV maximum frequency 1675MHz and the power consumption is 5.87mW. The proposed DCO satisfies Mobile-DTV standards such as ATSC-M/H, DVB-H, ISDB-T, T-DMB.

• Journal of IKEEE
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• v.15 no.1
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• pp.23-28
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• 2011

This paper describes design and implementation of a spread spectrum clock generator(SSCG). The proposed architecture generates the spread spectrum clock controlling a input voltage signal for VCDL(Voltage Controlled Delay Line). Spread charge pump is controlled by the SSC modulation logic block provides a control signal to VCDL through LPF in DLL. By using this architecture, chip area and power consumption can be reduced because it is not necessary additional circuit to control modulation rate. This circuit has been designed and fabricated using the UMC 0.25um CMOS technology. The chip occupies an area of 290${\times}$120um^2.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.6
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• pp.550-557
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• 2003

In this paper, two dualband internal antennas for GPS/PCS handset are proposed. At first, the monopole antenna with parasitic dipole element is designed to print PCB of handset directly. At second, the antenna with bended loop structure is designed to bend to use internal space of handset maximumly. The proposed dualband internal antennas provide a 2:1 VSWR bandwidth of over 19.1 % which are possible to cover two bands at once. the antennas have a gain between -0.4 and 3.33 ㏈i at all bands and they have almost omni-directional patterns.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.6
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• pp.1283-1288
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• 2015

In general, IC chip circuit which is operating a cryptographic computation tends to radiate stronger electromagnetic signal to the outside. By using a power detecter such as a loop antenna near cryptographic device, the encryption key can be identified by probing a electromagnetic signal. To implement a method against non-invasive type attack, multi dielectric slab structure on IC chip to suppress radiated electromagnetic signal was introduced. Multiple dielectric slab was implemented by suitably configured to have the Bragg reflection characteristics, and then the reflection response was computed and verified its effectiveness. As a result, the thickness of the dielectric coating was 2mm and the reflection response characteristics for the vertical incidence was achieved to be 91% level.

• Journal of Korean Tunnelling and Underground Space Association
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• v.4 no.3
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• pp.207-216
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• 2002

Conventional Korean tunnel portals require a lot of overburden. For stability reasons, about 1.5 to 2.0 times the tunnel diameter is needed for the height in order to achieve a sufficient arching effect. Thus, considerable movement of earth and support constructions are required which lead to undesirably large changes of and damage to the environment. With a massively designed pipe roof, tunnels at low overburden can be built. To effectively construct pipe roof as an advanced safeguarding method, the following properties are indispensable: stability, insensitivity to settling and drilling accuracy. A new pipe roof method, AT-casing system, has been developed which on the one hand entirely combines the properties mentioned above, and which on the other hand permits the construction of safe, economical and environmentally friendly tunnels at low overburden heights of 3 to 5m.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.2
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• pp.46-52
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• 2014

This paper presents a multiple gain controlled digital phase and frequency detector with a fast lock-time. Lock-time of the digital PLL can be significantly reduced by applying proposed adaptive gain control technique. A loop gain of the proposed digital PLL is controlled by three conditions that are very large phase difference between reference and feedback signal, small phase difference and before lock-state, and after lock-state. The simulation result shows that lock-time of the proposed multiple gain controlled digital PLL is 100 times faster than that of the conventional structure with unit gain mode.

• The KIPS Transactions:PartA
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• v.9A no.2
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• pp.231-240
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• 2002

This paper proposes balancing scheduling effort more evenly between the compiler and the processor, by introducing independently scheduled VLIW instructions. Aggressively Packed VLIW (APVLIW) processor is aimed specifically at independent scheduling Very Long Instruction Word(VLIW) instructions with dependency information. The APVLIW processor independently schedules earth instruction within long instructions using functional unit and dynamic scheduler pairs. Every dynamic scheduler dynamically checks far data dependencies and resource collisions while scheduling each instruction. This scheduling is especially effective in applications containing loops. We simulate the architecture and show that the APVLIW processor performs significantly better than the VLIW processor for a wide range of cache sizes and across various numerical benchmark applications.

• Proceedings of the KIEE Conference
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• 2004.04a
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• pp.49-51
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• 2004

고전압 기기의 절연물 내부에서 부분방전 현상이 발생되면 절연파괴로 진전된다. 회전기기가 운전중인 상태에서 on-line 부분방전시험은 고정자 권선의 절연상태를 검사, 평가 할 수 있는 중요한 수단으로서 이러한 부분방전시험을 통하여 회전기기 시스템의 사고예방을 위한 진단을 할 수 있다. 부분방전 펄스는 10MHz $\sim$ 1GHz의 대역폭을 갖는 것으로 알려져 있으며, 이러한 고주파 대역의 전자파 에너지의 효과적인 검출을 위한 센서 중 하나로 웨이브가이드 구조의 고주파 검출센서가 존재한다. 기존의 전자기적 에너지를 검출하는 SSC (Stator Slot Coupler)센서를 한쪽 포트를 가지는 마이크로스트립센서 형태로 사용할 경우 접지면이 도체전체로 씌워져 있고 임피던스 정합을 위한 50옴의 칩저항이 신호라인과 접지사이 루프를 형성하여 기기 운전시 기기의 성능에 영향을 미칠 수 있는 단점을 가지고 있다. 이 단점을 보완하기 위해서 본 논문에서는 회전기내 부분방전 펄스의 전자기적 에너지를 검출할 수 있는 2선 평행 전송선로 라인을 응용한 부분방전 검출 센서를 제안하였고 시뮬레이션을 통해 성능을 입증하였다. 제안된 센서의 성능을 입증하기 위하여 2선 평행 전송선로 타입의 센서와 기존의 SSC (Stator Slot Coupler) 센서를 약간 변형시킨 마이크로 스트립 센서를 고정자 슬롯의 Wedge 부착한 후 두 센서 비교 분석하였다. 결과적으로 제안된 센서는 기존 SSC 타입의 마이크로스트립 센서에 비하여 더 간단한 형상을 가지며 운전 중 기기의 성능에 영향을 덜 미치는 효과를 얻을 수 있었다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.1A
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• pp.44-49
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• 2008

Recently, a so called orthogonal spatial multiplexing(OSM) scheme was presented which allows simple maximum likelihood decoding at the receiver with single phase feedback In this paper, by serially concatenating this scheme by a linear precoder, a new closed-loop SM scheme is proposed for two transmit arid two receive antennas. By computer simulation results, we show that the proposed scheme outperforms the conventional SM and OSM. For the proposed code, we also propose a new simple decoding algorithm which leads to a greatly reduced decoding complexity compared with the ML receiver without any loss of error performance.