• 제목/요약/키워드: 2 bits phase shifter

검색결과 8건 처리시간 0.021초

위상특성을 개선시킨 2 Bits MMIC 위상변위기 (2 Bits MMIC Phase Shifter Improving the Phase Characteristic)

  • 정명득
    • 대한전자공학회논문지TC
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    • 제40권9호
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    • pp.392-397
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    • 2003
  • Lange 커플러를 이용한 반사구조 위상변위기는 광대역에서 위상변이를 얻는데 사용되는 회로이다. 이런 5-비트 반사구조에서 33.75°는 대개 11.25°와 22.5°를 동시에 "on"시켜서 얻는 방법이 사용되어져 왔다. 본 논문은 33.75° 위상특성을 개선하기 위하여 GaAs PM 다이오드와 리액티브 부하로 구성된 별도의 회로를 제안하였으며 MMIC로 구현하였다. 2-6 GHz에서 제안된 회로는 기 발표 논문에 비하여 33.75°를 기준으로 할 때 평균 4.7° 개선된 특성을 얻었다. 기존 회로와 비교할 때 삽입손실 및 반사손실은 거의 변화가 없었다.

A Ku-Band 5-Bit Phase Shifter Using Compensation Resistors for Reducing the Insertion Loss Variation

  • Chang, Woo-Jin;Lee, Kyung-Ho
    • ETRI Journal
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    • 제25권1호
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    • pp.19-24
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    • 2003
  • This paper describes the performance of a Ku-band 5-bit monolithic phase shifter with metal semiconductor field effect transistor (MESFET) switches and the implementation of a ceramic packaged phase shifter for phase array antennas. Using compensation resistors reduced the insertion loss variation of the phase shifter. Measurement of the 5-bit phase shifter with a monolithic microwave integrated circuit demonstrated a phase error of less than $7.5{\circ}$ root-mean-square (RMS) and an insertion loss variation of less than 0.9 dB RMS for 13 to 15 GHz. For all 32 states of the developed 5-bit phase shifter, the insertion losses were $8.2{\pm}1.4$dB, the input return losses were higher than 7.7 dB, and the output return losses were higher than 6.8 dB for 13 to 15 GHz. The chip size of the 5- bit monolithic phase shifter with a digital circuit for controlling all five bits was 2.35 mm ${\times}$1.65 mm. The packaged phase shifter demonstrated a phase error of less than $11.3{\circ}$ RMS, measured insertion losses of 12.2 ${\pm}$2.2 dB, and an insertion loss variation of 1.0 dB RMS for 13 to 15 GHz. For all 32 states, the input return losses were higher than 5.0 dB and the output return losses were higher than 6.2 dB for 13 to 15 GHz. The size of the packaged phase shifter was 7.20 mm${\times}$ 6.20 mm.

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초고주파 PIN 다이오드 4-bit 변위기의 구현 (Design of a Microwave PIN Diode 4-bit Phase Shifter)

  • 노태문;김찬홍;전중창;박위상;김범만
    • 전자공학회논문지A
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    • 제31A권6호
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    • pp.45-52
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    • 1994
  • A microwave PIN diode 4-bit phase shifter is designed in X-band. A loaded-line type is used for the 22.5$^{\circ}$ and 45$^{\circ}$ bits, and a switched-line type for the 90$^{\circ}$and 180$^{\circ}$bits. The measured results show that the phase error and average insertion loss are less than $\pm$5.4$^{\circ}$and 7.2dB, respectively, over a 9.75~10.25GHz frequency band.

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광대역 빔 조향을 위한 위상 배열 안테나의 실시간 지연 위상 천이기 구성에 관한 연구 (A Study on Configuration of True Time Delay Phase Shifter for Wideband Beam Steering Phased Array Antenna)

  • 정진우;류지호;박재돈;서종우
    • 한국군사과학기술학회지
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    • 제20권3호
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    • pp.413-420
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    • 2017
  • We investigate the performance of a true time delay(TTD) phase shifter to reduce the beam squint caused by frequency changes of a phased array antenna in wideband communication systems. To design a high gain phased array antenna, we need a long TTD, which causes high RF loss, low resolution and large dimension of TTD phase shifters. To overcome the problems, we propose a schematic of dual TTD phase shifters, which consists of short time delay(STD) in radio frequency(RF) part and long time delay(LTD) in intermediate frequency(IF) part. Our analysis results show that the proposed scheme reduces the required bits and delay time in RF band of the TTD compared to the conventional single TTD scheme.

12 GHz대 능동 위상 배열 안테나 시스템을 위한 5-비트 디지털 위상 변위기 (5-Bit Digital Phase Shifter for 12 GHz Band Active Phased Array Antenna System)

  • 김경식;최익권
    • 한국전자파학회논문지
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    • 제13권3호
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    • pp.308-315
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    • 2002
  • 12 GHz 대역 미국의 위성 방송을 이동중인 차량내에서 수신하기 위한 능동 위상 배열 안테나 시스템용 5-비트 디지털 위상 변위기를 총 10개의 InGaAs HEMT를 가지고 설계, 제작하였다.. 11.25$^{\circ}$,22.5$^{\circ}$,45$^{\circ}$의 위상 비트들은 부하 선로형 방식으로, 90$^{\circ}$, 180$^{\circ}$의 위상 비트들은 링 하이브리드와 결합된 반사형 방식으로 각각 설계, 제작하였으며 각 위상 비트당 2개의 InGaAs HEMT를 사용하였다. 제작된 5-비트 위상 변위기는 12.2 GHz~12.7 대역에서 2개의 위상 응답에 대하여 17.5 ㏈ 이상의 반사 손실, 7.8 ㏈ 이하의 삽입 손실 및 초대 $\pm$6$^{\circ}$의 위상 오차가 측정되었다.

A Study of 0.5-bit Resolution for True-Time Delay of Phased-Array Antenna System

  • Cha, Junwoo;Park, Youngcheol
    • International journal of advanced smart convergence
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    • 제11권4호
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    • pp.96-103
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    • 2022
  • This paper presents the analysis of increasing the resolution of True-Time-Delay (TTD) by 0.5-bit for phased-array antenna system which is one of the Multiple-Input and Multiple Output (MIMO) technologies. For the analysis, a 5.5-bit True-Time Delay (TTD) integrated circuit is designed and analyzed in terms of beam steering performance. In order to increase the number of effective bits, the designed 5.5-bit TTD uses Single Pole Triple Throw (SP3T) and Double Pole Triple Throw (DP3T) switches, and this method can minimize the circuit area by inserting the minimum time delay of 0.5-bit. Furthermore, the circuit mostly maintains the performance of the circuit with the fully added bits. The idea of adding 0.5-bit is verified by analyzing the relation between the number of bits and array elements. The 5.5-bit TTD is designed using 0.18 ㎛ RF CMOS process and the estimated size of the designed circuit excluding the pad is 0.57×1.53 mm2. In contrast to the conventional phase shifter which has distortion of scanning angle known as beam squint phenomenon, the proposed TTD circuit has constant time delays for all states across a wide frequency range of 4 - 20 GHz with minimized power consumption. The minimum time delay is designed to have 1.1 ps and 2.2 ps for the 0.5-bit option and the normal 1-bit option, respectively. A simulation for beam patterns where the 10 phased-array antenna is assumed at 10 GHz confirms that the 0.5-bit concept suppresses the pointing error and the relative power error by up to 1.5 degrees and 80 mW, respectively, compared to the conventional 5-bit TTD circuit.

PIN 다이오드를 이용한 C-Band 위상 변위기의 설계에 관한 연구 (A Study On the Design of C-Band Phase Shifter Using PIN Diode)

  • 김한석;김훈영;이창식;이종악
    • 전기전자학회논문지
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    • 제3권2호
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    • pp.259-267
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    • 1999
  • 본 논문에서 C-밴드 6-비트 변위기의 설계와 제작을 하였고 각 비트에 대한 설계 기술을 기술하였다. $5.625^{\circ},\;11.25^{\circ},\;22.5^{\circ}$ 그리고 $45^{\circ}$ 위상 비트는 부하선로 방식, $90^{\circ}$ 위상 비트는 하이브리드 결합 방식 그리고 $180^{\circ}$ 위상 비트는 가변선로 방식을 각각 마이크로스트립 구리 기판 위에 적용하였다.

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슬롯결합구조를 갖는 이동통신 기지국용 마이크로스트립 위상배열 안테나의 설계 (A design of the microstrip phased array antenna with the slot-coupled structure for the base station of mobile communication)

  • 장정필;장병준;윤영중;박한규
    • 한국통신학회논문지
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    • 제21권12호
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    • pp.3205-3214
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    • 1996
  • In this paper, the microstrip phased array antennas with coupling-slots for the base station of mobile communication is proposed and anlyzed with accurate analysis method which is based on both reciprocity principle and full-wave analysis. The basis functions used for the numerical analysis are determined depending upon the accuracy, convergence properties of the solution, and the computation time. The patch uses 3 EB mode and the slot uses IPWS mode. The designed phased array antenna has 8 slot-coupled microstrip patch array elements and the beam scanning capability is obtained by using the 4-bit PIN-diode phase shifters as switching devices which are consisted of the loaded line phase shifters for 30.deg. and 60.deg. and the reflection type phase shifters for 90.deg. and 180.deg. repectively. The 4-bits phase shifters which aremade by connecting each phase shifter have about 2.deg.-3.deg. phase errors and their insertion loss are about 3dB for each phase state. The fabricated 8-element phased array antenna with 4-bits phase shifters provides 12.deg.-14.deg. beamwidths depending on the scanning angle and is capable of scanning its beam to .+-.45.deg. with 9.deg. intervals, and the gain 12dBi. The overall results show that the slot-coupled phased array antenna has great advantages of wideband, high gain and reduced spurious radiation. Also, the antenna can be made small and thin. Furthermore, the scanning property of this antenna allows for its application in several areas, such as mobile communication system and PCS.

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