• Title/Summary/Keyword: 17GHz

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Enhanced fT and fMAX SiGe BiCMOS Process and Wideband Power Efficient Medium Power Amplifier

  • Bae, Hyun-Cheol;Oh, Seung-Hyeub
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.8 no.3
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    • pp.232-238
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    • 2008
  • In this paper, a wideband power efficient 2.2 GHz - 4.9 GHz Medium Power Amplifier (MPA), has been designed and fabricated using $0.8{\mu}m$ SiGe BiCMOS process technology. Passive elements such as parallel-branch spiral inductor, metal-insulator-metal (MIM) capacitor and three types of resistors are all integrated in this process. This MPA is a two stage amplifier with all matching components and bias circuits integrated on-chip. A P1dB of 17.7 dBm has been measured with a power gain of 8.7 dB at 3.4 GHz with a total current consumption of 30 mA from a 3 V supply voltage at $25^{\circ}C$. The measured 3 dB bandwidth is 2.7 GHz and the maximum Power Added Efficiency (PAE) is 41 %, which are very good results for a fully integrated Medium PA. The fabricated circuit occupies a die area of $1.7mm{\times}0.8mm$.

A Design of Broadband Biconical Antenna with Tapered Section (테이퍼 구조를 갖는 광대역 바이코니컬 안테나의 설계)

  • Kim, Jun-Kyu;Lee, In-Jae;Yoon, Hyun-Bo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.11 s.114
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    • pp.1096-1104
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    • 2006
  • In this paper, the broadband antenna for the combined base station of Cellular/PCS/IMT-2000/Wibro and S-DMB services is designed and the proposed antenna allows having sufficient coverage for each service band. In order to get the broadband impedance matching, the tapered sections are applied on the both terminus of hi-conical respectively. The design parameter is calculated and simulated by using FDTD method. As a result, the measured bandwidth of the proposed antenna is $0.79GHz{\sim}2.93GHz$ and the gain is distributed from 5.5 dBi up to 8.19 dBi.

Design of Circularly Polarized Array Antenna for 5.8GHz Microwave Wireless Power Transmission (5.8GHz 마이크로파 무선전력전송을 위한 원형 편파 배열 안테나 설계)

  • Lee, Seong Hun;Son, Myung Sik
    • Journal of the Semiconductor & Display Technology
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    • v.17 no.2
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    • pp.20-25
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    • 2018
  • In this paper, we have designed circularly polarized array antenna for 5.8GHz microwave wireless power transmission. To obtain high antenna gain, we studied a single patch antenna, a $2{\times}1$ array antenna, a $2{\times}2$ array antenna, a $2{\times}4$ array antenna, and a $4{\times}4$ array antenna. Commonly, characteristics of each antenna have a frequency of 5.8 GHz and Right Hand Circular Polarization(RHCP) of circular polarization. Also, the results were obtained with the design to each antenna that the return loss was less than -10dB and the axial ratio was less than 3dB. The gain of the antennas was 6.08dBi for a single patch antenna, 9.69dBi for a $2{\times}1$ array antenna, 12.99dBi for a $2{\times}2$ array antenna, 15.72dBi for a $2{\times}4$ array antenna and 18.39dBi for a $4{\times}4$ array antenna. When the elements of the array antenna were increased, it was confirmed that it increased by about 3dBi.

Design and Analysis of 2 GHz Low Noise Amplifier Layout in 0.13um RF CMOS

  • Lee, Miyoung
    • Journal of Advanced Information Technology and Convergence
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    • v.10 no.1
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    • pp.37-43
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    • 2020
  • This paper presents analysis of passive metal interconnection of the LNA block in CMOS integrated circuit. The performance of circuit is affected by the geometry of RF signal path. To investigate the effect of interconnection lines, a cascode LNA is designed, and circuit simulations with full-wave electromagnetic (EM) simulations are executed for different positions of a component. As the results, the position of an external capacitor (Cex) changes the parasitic capacitance of electric coupling; the placement of component affects the circuit performance. This analysis of interconnection line is helpful to analyze the amount of electromagnetic coupling between the lines, and useful to choose the signal path in the layout design. The target of this work is the RF LNA enabling the seamless connection of wireless data network and the following standards have to be supported in multi-band (WCDMA: 2.11~ 2.17 GHz, CDMA200 1x : 1.84~1.87 GHz, WiBro : 2.3~2.4GHz) mobile application. This work has been simulated and verified by Cadence spectre RF tool and Ansoft HFSS. And also, this work has been implemented in a 0.13um RF CMOS technology process.

Four-channel GaAs multifunction chips with bottom RF interface for Ka-band SATCOM antennas

  • Jin-Cheol Jeong;Junhan Lim;Dong-Pil Chang
    • ETRI Journal
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    • v.46 no.2
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    • pp.323-332
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    • 2024
  • Receiver and transmitter monolithic microwave integrated circuit (MMIC) multifunction chips (MFCs) for active phased-array antennas for Ka-band satellite communication (SATCOM) terminals have been designed and fabricated using a 0.15-㎛ GaAs pseudomorphic high-electron mobility transistor (pHEMT) process. The MFCs consist of four-channel radio frequency (RF) paths and a 4:1 combiner. Each channel provides several functions such as signal amplification, 6-bit phase shifting, and 5-bit attenuation with a 44-bit serial-to-parallel converter (SPC). RF pads are implemented on the bottom side of the chip to remove the parasitic inductance induced by wire bonding. The area of the fabricated chips is 5.2 mm × 4.2 mm. The receiver chip exhibits a gain of 18 dB and a noise figure of 2.0 dB over a frequency range from 17 GHz to 21 GHz with a low direct current (DC) power of 0.36 W. The transmitter chip provides a gain of 20 dB and a 1-dB gain compression point (P1dB) of 18.4 dBm over a frequency range from 28 GHz to 31 GHz with a low DC power of 0.85 W. The P1dB can be increased to 20.6 dBm at a higher bias of +4.5 V.

Design of CMOS LC VCO with Fast AFC Technique for IEEE 802.11a/b/g Wireless LANs (IEEE 802.11a/b/g 무선 랜을 위한 고속 AFC 기법의 CMOS LC VCO의 설계)

  • Ahn Tae-Won;Yoon Chan-Geun;Moon Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.9 s.351
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    • pp.17-22
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    • 2006
  • CMOS LC VCO with fast response adaptive frequency calibration (AFC) technique for IEEE 802.11a/b/g WLANs is designed in 1.8V $0.18{\mu}m$ CMOS process. The possible operation is verified for 5.8GHz band, 5.2GHz band, and 2.4GHz band using the switchable L-C resonators. To linearize its frequency-voltage gain (Kvco), optimized multiple MOS varactor biasing tecknique is used. In order to operate in each band frequency range with reduced VCO gain, 4-bit digitally controlled switched- capacitor bank is used and a wide-range digital logic quadricorrelator (WDLQ) is implemented for fast frequency detector.

Design of Ultra Wide Band MMIC Digital Attenuator with High Attenuation Accuracy (높은 감쇠 정확도를 가지는 초광대역 MMIC 디지털 감쇠기 설계)

  • Ju Inkwon;Yom In-Bok
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.2 s.105
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    • pp.101-109
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    • 2006
  • A broadband, DC to 40 GHz 5-bit MMIC digital attenuator has been developed. The ultra broadband attenuator has been achieved by adding transmission lines in the conventional Switched-T attenuator and optimizing the transmission line parameters. Momentum simulation was performed in design for accurate performance prediction at high frequencies and Monte Carlo analysis was applied to verify the performance stability against the MMIC process variation. The attenuator has been fabricated with $0.15\;{\mu}m$ GaAs pHEMT process. This attenuator has 1 dB resolution and 23 dB dynamic ranges. High attenuation accuracy has been achieved over all attenuation ranges and 40 GHz bandwidth with the reference state insertion loss of less than 6 dB at 20 GHz. The input and output return losses of the attenuator are better than 14 dB over all attenuation states and frequencies. The measured IIP3 of the attenuator is 33 dBm.

Design and Implementation of Wideband Patch Antenna with Folded and Shorted Structure for 5 GHz WLAN (폴디드 구조와 단락 구조를 이용한 5 GHz 무선 랜용 광대역 패치 안테나 설계 및 구현)

  • Kim Yong-Hee;Han Jun-Hee;Lee Won-Kew;Yang Woon-Geun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.8 s.111
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    • pp.760-766
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    • 2006
  • In this paper, we present a wideband patch antenna with folded and shorted structure for 5 GHz WLAN(Wireless Local Area Network). The proposed antenna used folded and shorted structure in the rectangular patch for miniaturization and wide frequency bandwidth. The antenna was designed by using 3D simulation program, HFSS(High Frequency Structure Simulator) software of the Ansoft company and the implemented antenna was measured by using HP 8720c network analyzer and far field measurement chamber. Simulation result on the return loss shows fairly good characteristic of at least 13.41dB in whole frequency range of interests, and the 10dB bandwidth is 1,523MHz which shows wide bandwidth characteristic. And the simulated maximum gain of the proposed antenna is 6.57 dBi at 5.825GHz. Measured result for the 10dB bandwidth of the implemented folded and shorted structure antenna is 1,377 MHz. Measured maximum gain of the implemented antenna is 6.87dBi at 5.775GHz. Measured results for the implemented antenna showed applicable performances for the 5 GHz WLAN.

Design and Implementation of Linear Gain Equalizer for Microwave band (초고주파용 선형 이득 등화기 설계 및 제작)

  • Kim, Kyoo-Hwan
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.17 no.11
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    • pp.635-639
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    • 2016
  • In the devices used in the microwave frequency band, the gain decreases as the frequency increases due to the parasitic component. To compensate for these characteristics, a linear gain equalizer with an opposite slope is needed in wideband systems, such as those used for electronic warfare. In this study, a linear gain equalizer that can be used in the 18 ~ 40GHz band is designed and fabricated. Circuit design and momentum design (optimizations) were carried out to reduce the errors between design and manufacturing. A thin film process is used to minimize the parasitic components within the implementation frequency band. A sheet resistance of 100 ohm/square was employed to minimize the wavelength variation due to the length of the thin film resistor. This linear gain equalizer is a structure that combines a quarter wavelength-resonator on a series microstrip line with a resistor. All three 1/4 wavelength short resonators were used. The fabricated linear gain equalizer has a loss of more than -5dB at 40GHz and a 6dB slope in the 18 ~ 40GHz band. By using the manufactured gain equalizer in a multi-stage connected device such as an electronic warfare receiver, the gain flatness degradation with increasing frequency can be reduced.

A Design and Manufacture of Antenna with DGS(Defected Ground System) for WLAN/WiMAX system (WLAN/WiMAX 시스템 적용을 위한 DGS를 갖는 삼중대역 안테나 설계 및 제작)

  • Seo, Na-Hyun;Rhee, Young-Chul;Yoon, Joong-Han
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.4
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    • pp.679-687
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    • 2017
  • In this paper, a microstrip-fed triple-band monopole antenna with DGS (Defected Ground Structure) for WLAN/WiMAX applications was proposed. The proposed antenna is based on a microstrip-fed structure, and composed of two strip lines and DGS structure and then designed in order to get triple band characteristics. We carried out simulation about parameters. Adjusted the position and length of the two strips and three slits, we get the optimized parameters. The proposed antenna is fabricated on an FR-4 substrate of which the dielectric constant is 4.4, and its overall size is $34mm(W_1){\times}34mm(L_1){\times}1.6mm(t)$, and its proposed antenna size is $17.0mm(W_6){\times}30.75mm(L_3+L_4+L_9)$. From the fabricated and measured results, return loss of the proposed antenna satisfied return loss -10dB bandwidth 360 MHz (2.335~2.695 GHz), 645 MHz (3.37~4.015 GHz) and 1,770 MHz (5.14~6.91 GHz). And measured results of gain and radiation patterns characteristics displayed for operating bands.