• Title/Summary/Keyword: 16 bit communication

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Performance Analysis of Noncoherent OOK UWB Transceiver for LR-WPAN (저속 WPAN용 비동기 OOK 방식 UWB 송수신기 성능 분석)

  • Ki Myoungoh;Choi Sungsoo;Oh Hui-Myoung;Kim Kwan-Ho
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.11A
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    • pp.1027-1034
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    • 2005
  • IEEE802.15.4a, which is started to realize the PHY layer including high precision ranging/positioning and low data rate communication functions, requires a simple and low power consumable transceiver architecture. To satisfy this requirements, the simple noncoherent on-off keying (OOK) UWB transceiver with the parallel energy window banks (PEWB) giving high precision signal processing interface is proposed. The flexibility of the proposed system in multipath fading channel environments is acquired with the pulse and bit repetition method. To analyze the bit error rate (BER) performance of this proposed system, a noise model in receiver is derived with commonly used random variable distribution, chi-square. BER of $10^{-5}$ under the line-of-sight (LOS) residential channel is achieved with the integration time of 32 ns and signal to noise ratio (SNR) of 15.3 dB. For the non-line-of-sight (NLOS) outdoor channel, the integration time of 72 ns and SNR of 16.2 dB are needed. The integrated energy to total received energy (IRR) for the best BER performance is about $86\%$.

A Distributed address allocation scheme based on three-dimensional coordinate for efficient routing in WBAN (WBAN 환경에서 효율적인 라우팅을 위한 3차원 좌표 주소할당 기법의 적용)

  • Lee, Jun-Hyuk
    • Journal of Digital Contents Society
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    • v.15 no.6
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    • pp.663-673
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    • 2014
  • The WBAN technology means a short distance wireless network which provides each device interactive communication by connecting devices inside and outside of body. Standardization on the physical layer, data link layer, network layer and application layer is in progress by IEEE 802.15.6 TG BAN. Wireless body area network is usually configured in energy efficient using sensor and zigbee device due to the power limitation and the characteristics of human body. Wireless sensor network consist of sensor field and sink node. Sensor field are composed a lot of sensor node and sink node collect sensing data. Wireless sensor network has capacity of the self constitution by protocol where placed in large area without fixed position. In this paper, we proposed the efficient addressing scheme for improving the performance of routing algorithm by using ZigBee in WBAN environment. A distributed address allocation scheme used an existing algorithm that has wasted in address space. Therefore proposing x, y and z coordinate axes from divided address space of 16 bit to solve this problems. Each node was reduced not only bitwise but also multi hop using the coordinate axes while routing than Cskip algorithm. I compared the performance between the standard and the proposed mechanism through the numerical analysis. Simulation verified performance about decrease averaging multi hop count that compare proposing algorithm and another. The numerical analysis results show that proposed algorithm reduced the multi hop better than ZigBee distributed address assignment

Performance Analysis of Receiver for Underwater Acoustic Communications Using Acquisition Data in Shallow Water (천해역 취득 데이터를 이용한 수중음향통신 수신기 성능분석)

  • Kim, Seung-Geun;Kim, Sea-Moon;Yun, Chang-Ho;Lim, Young-Kon
    • The Journal of the Acoustical Society of Korea
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    • v.29 no.5
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    • pp.303-313
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    • 2010
  • This paper describes an acoustic communication receiver structure, which is designed for QPSK (Quadrature Phase Shift Keying) signal with 25 kHz carrier frequency and 5 kHz symbol rate, and takes samples from received signal at 100 kHz sampling rate. Based on the described receiver structure, optimum design parameters, such as number of taps of FF (Feed-Forward) and FB (Feed-Back) filters and forgetting factor of RLS (Recursive Least-Square) algorithm, of joint equalizer are determined to minimize the BER (Bit Error Rate) performance of the joint equalizer output symbols when the acquisition data in shallow water using implemented acoustic transducers is decimated at a rate of 2:1 and then enforced to the input of receiver. The transmission distances are 1.4 km, 2.9 km, and 4.7 km. Analysis results show that the optimum number of taps of FF and FB filters are different according to the distance between source and destination, but the optimum or near optimum value of forgetting factor is 0.997. Therefore, we can reach a conclusion that the proper receiver structure could change the number of taps of FF and FB filters with the fixed forgetting factor 0.997 according to the transmission distance. Another analysis result is that there are an acceptable performance degradation when the 16-tap-length simple filter is used as a low-pass filter of receiver instead of 161-tap-length matched filter.

Blind Classification of Speech Compression Methods using Structural Analysis of Bitstreams (비트스트림의 구조 분석을 이용한 음성 부호화 방식 추정 기법)

  • Yoo, Hoon;Park, Cheol-Sun;Park, Young-Mi;Kim, Jong-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.1
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    • pp.59-64
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    • 2012
  • This paper addresses a blind estimation and classification algorithm of the speech compression methods by using analysis on the structure of compressed bitstreams. Various speech compression methods including vocoders are developed in order to transmit or store the speech signals at very low bitrates. As a key feature, the vocoders contain the block structure inevitably. In classification of each compression method, we use the Measure of Inter-Block Correlation (MIBC) to check whether the bitstream includes the block structure or not, and to estimate the block length. Moreover, for the compression methods with the same block length, the proposed algorithm estimates the corresponding compression method correctly by using that each compression method has different correlation characteristics in each bit location. Experimental results indicate that the proposed algorithm classifies the speech compression methods robustly for various types and lengths of speech signals in noisy environment.

The design and performance analysis of RS(255,223) code for X-band downlink of STSAT-3 (과학기술위성3호의 X-대역 하향링크를 위한 RS(255,223) 코드 설계 및 성능 분석)

  • Seo, In-Ho;Kim, Byung-Jun;Lee, Jong-Ju;Kwak, Seong-Woo
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.38 no.2
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    • pp.195-199
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    • 2010
  • (255,223) RS(Reed-Solomon) code which is the CCSDS(Consultative Committee for Space Data Systems) standard was used in the STSAT-3 to correct errors during the downlink of payload data. The RS encoder developed by VHDL was implemented in MMU(Mass Memory Unit). Moreover, the RS decoder developed by C-language was implemented in the DRS(Data Receiving System) of ground station. In this paper, we reported the design and analysis results of RS(255,223) for STSAT-3. The BER(Bit Error Rate) performance from MMU to DRS was confirmed through the downlink test at 16 Mbps. Also, the error correction performance and capability of RS(255,223) was tested by the manual attenuation of the RF(Radio Frequency) signal in the X-band transmitter resulting in putting some errors in the communication line.

An Efficient Hardware Implementation of ARIA Block Cipher Algorithm Supporting Four Modes of Operation and Three Master Key Lengths (4가지 운영모드와 3가지 마스터 키 길이를 지원하는 블록암호 알고리듬 ARIA의 효율적인 하드웨어 구현)

  • Kim, Dong-Hyeon;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.11
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    • pp.2517-2524
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    • 2012
  • This paper describes an efficient implementation of KS(Korea Standards) block cipher algorithm ARIA. The ARIA crypto-processor supports three master key lengths of 128/192/256-bit and four modes of operation including ECB, CBC, OFB and CTR. A hardware sharing technique, which shares round function in encryption/decryption with key initialization, is employed to reduce hardware complexity. It reduces about 20% of gate counts when compared with straightforward implementation. The ARIA crypto-processor is verified by FPGA implementation, and synthesized with a $0.13-{\mu}m$ CMOS cell library. It has 46,100 gates on an area of $684-{\mu}m{\times}684-{\mu}m$ and the estimated throughput is about 1.28 Gbps at 200 MHz@1.2V.

A Study on Horizontal Shuffle Scheduling for High Speed LDPC decoding in DVB-S2 (DVB-S2 기반 고속 LDPC 복호를 위한 Horizontal Shuffle Scheduling 방식에 관한 연구)

  • Lim, Byeong-Su;Kim, Min-Hyuk;Jung, Ji-Won
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.10
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    • pp.2143-2149
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    • 2012
  • DVB-S2 employs LDPC codes which approach to the Shannon's limit, since it has characteristics of a good distance, error floor does not appear. Furthermore it is possible to processes full parallel processing. However, it is very difficult to high speed decoding because of a large block size and number of many iterations. This paper present HSS algorithm to reduce the iteration numbers without performance degradation. In the flooding scheme, the decoder waits until all the check-to-variable messages are updated at all parity check nodes before computing the variable metric and updating the variable-to-check messages. The HSS algorithm is to update the variable metric on a check by check basis in the same way as one code draws benefit from the other. Eventually, LDPC decoding speed based on HSS algorithm improved 30% ~50% compared to conventional one without performance degradation.

Design of eFuse OTP Memory Programmable in the Post-Package State for PMICs (Post-Package 프로그램이 가능한 eFuse OTP 메모리 설계)

  • Jin, Liyan;Jang, Ji-Hye;Kim, Jae-Chul;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.8
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    • pp.1734-1740
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    • 2012
  • In this paper, we propose a FSOURCE circuit which requires such a small switching current that an eFuse OTP memory can be programmed in the post-package state of the PMIC chips using a single power supply. The proposed FSOURCE circuit removes its short-circuit current by using a non-overlapped clock and reduces its maximum current by reducing the turned-on slope of its driving transistor. Also, we propose a DOUT buffer circuit initializing the output data of the eFuse OTP memory with arbitrary data during the power-on reset mode. We design a 24-bit differential paired eFuse OTP memory which uses Magnachip's $0.35{\mu}m$ BCD process, and the layout size is $381.575{\mu}m{\times}354.375{\mu}m$($=0.135mm^2$).

An Area-efficient Design of SHA-256 Hash Processor for IoT Security (IoT 보안을 위한 SHA-256 해시 프로세서의 면적 효율적인 설계)

  • Lee, Sang-Hyun;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.22 no.1
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    • pp.109-116
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    • 2018
  • This paper describes an area-efficient design of SHA-256 hash function that is widely used in various security protocols including digital signature, authentication code, key generation. The SHA-256 hash processor includes a padder block for padding and parsing input message, so that it can operate without software for preprocessing. Round function was designed with a 16-bit data-path that processed 64 round computations in 128 clock cycles, resulting in an optimized area per throughput (APT) performance as well as small area implementation. The SHA-256 hash processor was verified by FPGA implementation using Virtex5 device, and it was estimated that the throughput was 337 Mbps at maximum clock frequency of 116 MHz. The synthesis for ASIC implementation using a $0.18-{\mu}m$ CMOS cell library shows that it has 13,251 gate equivalents (GEs) and it can operate up to 200 MHz clock frequency.

Study on the OMAC-SNEP for Unattended Security System Using Wireless Sensor Networks (무선 센서 네트워크를 이용한 무인 경비 시스템에서의 OMAC-SNEP 기술에 관한 연구)

  • Lee Seong-Jae;Kim Hak-Beom;Youm Heung-Youl
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.16 no.1
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    • pp.105-114
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    • 2006
  • Ubiquitous Sensor Network consists of a number of sensor nodes with a limited computation power and limited communication capabilities, and a sensor node is able to communicate with each other at anytime and in any place. Due to the rapid research and development in sensor networks, it will rapidly grow into environments where hmm beings can interact in an intuitive way with sensing objects which can be PDAs, sensors, or even clothes in the future. We are aiming at realizing an Unattended Secure Security System to apply it to Ubiquitous Sensor Network. In this paper, the vulnerabilities in the Unattended security system are identified, and a new protocol called OMAC-SNEP is proposed for the Unattended Secure Security System. Because the CBC-MAC in SNEP is not secure unless the message length is fixed, the CBC-MAC in SNEP was replaced with OMAC in SNEP. We have shown that the proposed protocol is secure for my bit length of messages and is almost as efficient as the CBC-MAC with only one key. OMAC-SNEP can be used not only in Unattended Security System, but also any other Sensor Networks.