• 수산해양기술연구
• /
• 제22권1호
• /
• pp.34-40
• /
• 1986

This paper deals with a new bit conversion method. When 12 bit AID converter is adapted to 16 bit micro-computer, complicated data aquisition method is not necessary to acquire the AID converted data into memory of computer. However, when the 12 bit AID converter is adapted to the 8 bit micro-computer 12 bit data should be divided into 4 bit data and 8 bit data. Therefore the old data-dividing method made 4 bitl2byte of memory space wasted. On the contrary, using the new bit conversion method suggested in this paper the two of 12 bit data are converted into 3 byte of data without extending the AID conversion time.

• 한국시뮬레이션학회:학술대회논문집
• /
• 한국시뮬레이션학회 2002년도 춘계학술대회논문집
• /
• pp.177-181
• /
• 2002

In this paper, the design of 12bit pipeline BiCMOS A/D converter presented. A BiCMOS operational amplifier and comparator suitable for use in the pipeline A/D converter. The main features is low distortion track-and-hold with 0-300MHz input bandwidth, and a proprietary 12bit multi-stage quantizer.

• 분석과학
• /
• 제5권3호
• /
• pp.295-301
• /
• 1992

IBM-PC를 위한 다목적용 데이타 채집 및 컨트롤 장치를 개발하였다. 개발된 데이타 채집 및 컨트롤 장치는 컴퓨터를 이용한 데이타 채집 및 기기 컨트롤에 필요한 주요 기능을 대부분 보유하고 있다. 아날로그 신호는 최고 4쌍의 차동신호를 받을 수 있으며 실험조건에 따라 두 개의 12-bit A/D 컨버터를 선택하여 처리할 수 있다. 또한 2개의 12-bit D/A 컨버터와 3채널의 16-bit 카운터/타이머, 그리고 24-bit 디지탈 입출력장치 등 실험실에서 컴퓨터를 이용한 실험자동화에 필요한 대부분의 기능을 가지고 있어 다목적용으로 사용될 수 있다.

• Journal of Electrical Engineering and Technology
• /
• 제9권6호
• /
• pp.2065-2069
• /
• 2014

The DAC-7512E is a 12-bit digital to analog converter that is low power and a single package with internal buffers. The DAC-7512E takes up minimal PCB area for applications of space power electronics design. The spacecraft mass is a crucial point considering spacecraft launch into space. Therefore, we have performed a TID test for the DAC-7512E 12-bit serial input digital to analog converter to reduce the spacecraft mass by using a low-level Gamma-ray irradiator with $Co^{60}$ gamma-ray sources. The irradiation with $Co^{60}$ gamma-rays was carried out at doses from 0 krad to 100 krad to check the error status of the device in terms of current, voltage and bit error status during conversion. The DAC-7512E 12-bit serial digital to analog converter should work properly from 0 krad to 30 krad without any error.

• 한국정보통신학회:학술대회논문집
• /
• 한국정보통신학회 2013년도 춘계학술대회
• /
• pp.352-353
• /
• 2013

본 연구에서는 12bit 1MSps 연속 근사화 아날로그-디지털 변환기(Analog to Digital Converter : ADC)를 설계하였다. 설계된 아날로그-디지털 변환기는 0.18um 1Metal 6Poly CMOS 공정을 이용하였고, Cadence tool을 이용하여 시뮬레이션 및 레이아웃 하였다. 시뮬레이션 결과 1.8V의 공급전압에서 전력 소모는 6mW였고, 입력 신호의 주파수가 100kHz 일 때, SNDR은 69.53dB, 유효 비트수는 11.26bit의 결과를 보였다.

• 한국세라믹학회지
• /
• 제32권10호
• /
• pp.1178-1188
• /
• 1995

Bi4Ti3O12 (BIT) and its rare earth (Y, Nd, Sm, Gd)-substituted derivatives were synthesized using a sol-gel method to investigate their microstructures, cystal structures and electrical properties depending on the subsituted elemetns. Nd- or Sm-substitution into BIT appeared to be favorable, while Y- or Gd-substitution occurred with a pyrochlore phase. This suggests that a smaller trivalent rare earth ion may not be favorable in the structure of BIT. The rare earth derivatives showed that their particle sizes and shapes were considerably different depending on the kinds of substituted elements. Y-substitution resulted in developing a relatively even particle size and a dense microstructure. In structure, they may be similar to the pseudo-orthorhombic BIT but close to a paraelectric tetragonal phase. Their a (or b) axes were shortened, compared to the one of BIT. Such a distortion may result a decrease in the tilting of TiO6. BIT and the derivatives showed that their dielectric constants and losses were 40~120 and less than 0.03, respectively in the frequency range of 1~10 MHz. The dielectric loss of Y-substituted derivative was the lowest one and changed a little to frequency. Curie points were observed in all the derivatives like BIT to suggest that they would be ferroelectric. The temperature stability of the delectric properties of the derivatives below the Curie points were relatively better than the one of BIT.

• 한국전자통신학회논문지
• /
• 제14권6호
• /
• pp.1145-1152
• /
• 2019

본 논문에서는 디지털 회로와 저소비전력 및 고속연산의 장점을 가진 아날로그 회로를 혼용하기 위하여, 저전력 전류모드 12비트 ADC(: Analog to Digital Converter)를 제안하였다. 제안하는 12비트 ADC는 4비트 ADC의 cascade 구조를 사용하여 소비전력을 줄일 수 있었으며, 변환 current mirror 회로를 사용해 칩면적을 줄일 수 있었다. 제안된 ADC는 매그나칩/SK하이닉스 350nm 공정으로 구현하였고, Cadence MMSIM을 사용하여 post-layout simulation를 진행하였다. 전원전압 3.3V에서 동작하고, 면적은 318㎛ x 514㎛를 차지하였다. 또한 제안하는 ADC는 평균 소비전력 3.4mW의 저소비전력으로 동작하는 가능성을 나타내었다.

• 한국전자통신학회논문지
• /
• 제7권2호
• /
• pp.295-301
• /
• 2012

본 논문에서는 고속 ADC의 앞단에서 사용하기 위한 1 $V_{pp}$의 입력 신호 범위에서 12 Bit의 해상도를 갖고 100 MS/s의 샘플링 속도에서 동작하는 SHA를 설계하였다. 제안된 시스템은 입력 주파수가 5 MHz, 샘플링 주파수 100 MHz 일 때 SFDR(Spurious Free Dynamic Range)가 약 66.3 dB로 해상도가 떨어졌으나 feedthrough를 제거한 회로는 SFDR이 약 73 dB로 12 bit 해상도를 갖는다.

• 한국시뮬레이션학회논문지
• /
• 제11권2호
• /
• pp.17-29
• /
• 2002

There is an increasing interest in high-performance A/D(Analog-to-Digital) converters for use in integrated analog and digital mixed processing systems. Pipeline A/D converter architectures coupled with BiCMOS process technology have the potential for realizing monolithic high-speed and high-accuracy A/D converters. In this paper, the design of 12bit pipeline BiCMOS A/D converter presented. A BiCMOS operational amplifier and comparator suitable for use in the pipeline A/D converter. Test/simulation results of the circuit blocks and the converter system are presented. The main features is low distortion track-and-hold with 0-300MHz input bandwidth, and a proprietary 12bit multi-stage quantizer. Measured value is DNL=${\pm}$0.30LSB, INL=${\pm}$0.52LSB, SNR=66dBFS and SFDR=74dBc at Fin=24.5MHz. Also Fabricated on 0.8um BiCMOS process.

• 한국IT서비스학회지
• /
• 제12권1호
• /
• pp.1-14
• /
• 2013

The government has implemented operating the bus information terminal (hereinafter, 'BIT') to use by building it at a major bus station to solve the problem of traffic congestion. Busan Metropolitan City has been continuously expanding the installation of 'BIT' since 2003. However, there are few research on the factor to use and satisfaction survey on 'BIT' from the perspective of the users. This study, in an effort to inquire into the 'BIT' utilization factor and its vitalization plan, conducted a face to face survey of 172 citizens who had the experience in the 'BIT'. The result of the data analysis showed that usability, convenience, and availability were the critical factors for a BIT use. In addition, the general intention to use 'BIT' was found to be very high as much as 90.7%. The contributions of this study are as follows. The academic contributions is that it proved the relationship between usability, convenience and the intention to use suggested by the information technology acceptance model is supported even in case of 'BIT.' For the practitioners this study provides ground data for a local government to make a plan of a BIT extension.