• Journal of the Microelectronics and Packaging Society
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• v.25 no.1
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• pp.41-45
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• 2018

As the size of semiconductor chip shrinks, the electronic industry has been paying close attention to fan-out wafer level packaging (FO-WLP) as an emerging solution to accommodate high input and output density. FO-WLP also has several advantages, such as thin thickness and good thermal resistance, compared to conventional packaging technologies. However, one major challenge in current FO-WLP manufacturing process is to control wafer warpage, caused by the difference of coefficient of thermal expansion and Young's modulus among the materials. Wafer warpage induces misalignment of chips and interconnects, which eventually reduces product quality and reliability in high volume manufacturing. In order to control wafer warpage, it is necessary to understand the effect of material properties and design parameters, such as chip size, chip to mold ratio, and carrier thickness, during packaging processes. This paper focuses on the effects of thickness of chip and molding compound on 12" wafer warpage after PMC of EMC using finite element analysis. As a result, the largest warpage was observed at specific thickness ratio of chip and EMC.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.81-81
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• 2009

반도체 산업의 중심 소재인 실리콘(Si)은 사용 목적과 환경에 따라 물성적 한계가 표출되기 시작했다. 그래서 각각의 목적에 맞는 재료의 개발이 필요하다는 것을 인식하게 되었다. SiC wafer는 큰 band gap energy와 고온 안정성, 캐리어의 높은 드리프트 속도 그리고 p-n 접합이 용이하다. 또한 소재 자체가 화학적으로 안정하고 $500\sim600^{\circ}C$에서 소자 제조 시 고온공정이 가능하며, 실리콘이나 GaAs에 비해 고출력을 낼 수 있는 재료이다. 반도체 소자로 이용하기 위한 wafer 가공 공정에 있어 물리적 힘에 의한 stress를 많이 받아 wafer가 휘는 현상이 생긴다. 반도체 소자의 기본이 되는 wafer가 휨 현상을 일으키면 wafer 위에 소자가 올라갈 경우 소자의 불균일성 때문에 반도체의 물성에 나쁜 영향을 미치게 된다. 그래서 반도체 소자의 기본이 되는 wafer의 휨 현상 개선이 중요하다. 본 연구에서는 산화로에서 Ar 분위기에서 압력 760torr, 온도 $1100^{\circ}C$ 부근에서의 조건으로 진행을 하여 wafer의 Flatness Tester(FT-900, NIDEK) 장비로 SORI, BOW, GBIR 값의 변화에 초점을 맞추었다. SiC 단결정을 sawing후 가공 전 wafer를 열처리하여 가공을 진행하는 것과 열처리 하지 않은 wafer의 SORI, BOW, GBIR 값 비교, 그리고 lapping, grinding, polishing 등의 가공 진행 중간 중간에 열처리를 하여 진행하는 것과 가공 진행 중간 중간에 열처리를 하지 않고 진행한 wafer의 SORI, BOW, GBIR 값의 비교를 통해 wafer의 휨 현상 개성에 관해 알아본다.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.37 no.9
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• pp.823-828
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• 2013

To reduce the cost per watt of photovoltaic power, it is important to reduce the cell thickness of crystalline silicon solar cells. As the thickness of the silicon layer is reduced, two distinctive thermal expansion rates between the silicon and the aluminum layer induce bowing in a solar cell. With a thinner silicon layer, the bowing distance grows exponentially. Excessive bowing could damage the silicon wafer. In this study, we tried to measure an irregularly curved silicon solar cell more accurately using a 3D image scanner. For the detailed analysis of the three-dimensional bowing shape, a least square fit was applied to the point data from the scanned image. It has been found that the bowing distance and shape distortion increase with a decrease in the thickness of the silicon layer. An Ag strip on top of the silicon layer can reduce the bowing distance.

• Journal of the Microelectronics and Packaging Society
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• v.17 no.4
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• pp.49-60
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• 2010

Semiconductor packages are increasingly moving toward miniaturization, lighter and high performance. Futhermore, packages become thinner. Thin packages will generate serious reliability problems such as warpage, crack and other failures. Reliability problems are mainly caused by the CTE mismatch of various package materials. Therefore, proper selection of the package materials and geometrical optimization is very important for controlling the warpage and the stress of the package. In this study, we investigated the characteristics of the warpage and the stress of several packages currently used in mobile devices such as CABGA, fcSCP, SCSP, and MCP. Warpage and stress distribution are analyzed by the finite element simulation. Key material properties which affect the warpage of package are investigated such as the elastic moduli, CTEs of EMC molding and the substrate. Geometrical effects are also investigated including the thickness or size of EMC molding, silicon die and substrate. The simulation results indicate that the most influential factors on warpage are EMC molding thickness, CTE of EMC, elastic modulus of the substrate. Simulation results show that warpage is the largest for SCSP. In order to reduce the warpage, DOE optimization is performed, and the optimization results show that warpage of SCSP becomes $10{\mu}m$.

• Computational Structural Engineering
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• v.9 no.3
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• pp.199-207
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• 1996

When an initially straight thin cylinder is bent, there is a tendency for the cross section to flatten. This phenomenon was investigated by L.G. Brazier in 1927 and is called "Brazier Effect" or "Brazier Theory". The main characteristic is the reduction of carrying capacity due to the decrease of bending stiffness by shortening of thickness with the increase of external load. And the relationship of curvature-bending moment becomes a soft spring type as shown in Fig.2. In this paper, the Brazier theory on plate type structures is investigated from the following view points : (1) What is the Brazier effect? (2) the reason of the occurrence of the Brazier effect in plate type structures by using beam model and (3) factors which cause the brazier effect.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.1
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• pp.29-33
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• 2019

With shrinking form factor and improving performance of electronic packages, high input/output (I/O) density is considered as an important factor. Fan out wafer-level packaging (FO-WLP) has been paid great attention as an alternative. However, FO-WLP is vulnerable to warpage during its manufacturing process. Minimizing warpage is essential for controlling production yield, and in turn, package reliability. While many studies investigated the effect of process and design parameters on warpage using finite element analysis, they did not take uncertainty into consideration. As parameters, including material properties, chip positions, have uncertainty from the point of manufacturing view, the uncertainty should be considered to reduce the gap between the results from the field and the finite element analysis. This paper focuses on the effect of uncertainty of Young's modulus of chip on fan-out wafer level packaging warpage using finite element analysis. It is assumed that Young's modulus of each chip follows the normal distribution. Simulation results show that the uncertainty of Young's modulus affects the maximum von Mises stress. As a result, it is necessary to control the uncertainty of Young's modulus of silicon chip since the maximum von Mises stress is a parameter related to the package reliability.

• Magazine of the Korea Concrete Institute
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• v.10 no.3
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• pp.185-196
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• 1998

이 논문은 직사각형 단면을 갖는 철근콘크리트 보에서 휨전단균열(Flexural-Shear Crack)이 원인을 규명하기 위해 모두 16개의 보를 실험한 결과를 기술한 것이다. 실험에 이용된 콘크리트보는 전단균열에 영향을 준다고 생각되는 몇 가지 요소를 인위적으로 소거 도는 고립되도록 특수하게 제작된 것이다. 이러한 특수보의 실험결과를 같은 재원을 갖는 보통의 정상보의 결과와 직접 비교하여서 그 차이를 분석함으로써 휨전단 균열의 발생원인을 규명하였다. 그 결과, 일반적인 콘크리트보에서의 휨전단균열 발생은 철근과 콘크리트의 경계면의 부착현상과 매우 밀접한 관련이 있는 것으로 나타났다. 또한 발생된 휨전단균열의 안정성은 주철근을 따라 발생되는 수평균열의 크기에 직접적인 영향을 받고 있는 것으로 나타났다. 본 연구에서 나타난 몇 가지 사실은 현재 사용중인 전단설계규준의 근본을 이루는 전단 위험단면개념과는 상반되는 것도 있었다. 실험에서 알아낸 사실을 근거로 전단파괴기구에 대한 새로운 가설을 제안하였다. 이 새 가설은 지금까지 잘 설명되지 않은 휨전단균열의 발생과 진행에 대한 원인 및 과정을 상당히 잘 설명해주고 있다고 생각된다.

• Journal of the Korean Ceramic Society
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• v.38 no.7
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• pp.643-647
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• 2001

퓨란수지로부터 유리질 탄소를 제조하였다. 유리질 탄소의 제조시, 사용된 수지가 경화 및 탄화 단계에서 많은 양의 가스를 방출하면서 큰 수축이 발생하여 크랙을 형성하고 휨 현상을 일으킨다. 이런 현상을 감소시키기 위하여 본 실험에서는 경화단계에서 압력을 가하고, 가열속도를 매우 느리게 하였다. 또한, 경화단계에서 무게감소와 수축율을 억제하고, 발생하는 가스의 배출을 용이하게 하여 궁극적으로는 시편의 크랙 및 휨 현상을 방지하고자 필러와 알콜을 첨가하였다. 그 결과, 무게감소와 수축을 억제하고 밀도의 증가를 가져왔고 유리질 탄소를 용이하게 제조할 수 있었으나 알코올을 첨가한 경우 필러의 양이 증가할수록 높은 비저항 값과 낮은 강도값을 나타내었다. 이런 현상은 알코올이 경화단계에서 분해 증발하면서 미세한 기포를 형성하고 이것들이 기공으로 전이하여 최종 제품에까지 영향을 주었기 때문이다.

• Journal of the Earthquake Engineering Society of Korea
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• v.11 no.5
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• pp.23-32
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• 2007

The goal of this study is to perform several bending tests on a shape memory alloy bar and to analyze the characteristics of the bending behavior. The other goal is to verify the seismic performance of an SMA bar bending application. Single and double bending tests were conducted with varying loading speeds and maximum displacement. The loading and the unloading stiffness were estimated from the force-displacement curves and the equivalent damping ratio of each test was also assessed. In single bending, the SMA bar showed the stiffness hardening after the displacement of 32 mm. It is assumed that this phenomenon is due to the stress-induced-martensite hardening. The increasing loading speed did not influence on the stiffness of the single bending SMA bar. The stiffness of the double bending bar is about 5 times of that of the single bending. This study introduced a seismic application of SMA bending bars as seismic restrainers for bridges and showed its practicality. SMA bars in bending are used for seismic restrainers in a three-span-simply-supported bridge. They showed the effectiveness to reduce the responses of the bridge and the applicability for a seismic restrainer. The significance of this study is to provide basic knowledge of SMA bending and its seismic applications.

• Proceedings of the Korean Fiber Society Conference
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• 1986.06a
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• pp.39-39
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• 1986