• The Transactions of the Korea Information Processing Society
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• v.6 no.8
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• pp.2098-2115
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• 1999

One of the unsolved problems in Neural Networks is the interpretation of hidden layers. This paper defines the Core-Net which has an input(p levels) and an output(q levels) with 2-layers as a basic circuit of neural network. In have suggested an equation, {{{{ {a}_{p,q} = {{q}^{2}} over {2}p(p-1)- { q} over {2 } (3 { p}^{2 } -7p+2)+ { p}^{2 }-3p+2}}}}, whichs ws the capacity of the Core-Net and have proved it by using the mathematical induction. It has been also shown that some of the problems with hidden layers can be solved by using the Core-Net and using simulation of an example.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.05a
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• pp.318-321
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• 2002

A static var compensator using hybrid cascade 5-level PWM inverter is presented for high voltage/high power applications. The proposed system is modelled by circuit DQ transformation, and thus an equivalent circuit is obtained which reveals the important characteristics of the system and lead to the related equations. The proposed system has advantages of hybrid structure which enhances the better utilization of power semiconductor switches, that is, both high power-low frequency switch, GTO and low power-high frequency switch, IGBT can be used in the same circuit. In this paper, circuit structure and characteristics is presented and the validity of the characteristics analysis is shown through PSIM simulation.

• Proceedings of the KIEE Conference
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• 2015.07a
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• pp.717-718
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• 2015

전동기를 설계 시 자기등가회로법은 전동기의 세부 형상에 크게 구애를 받지 않기 때문에, 공간고조파법과 수치해석기법에 비해 유용하다. 이 논문에서는 Spoke type PMSM(Permanent Magnet Synchronous Motor)의 회전자 자기등가회로를 설계하였다. 회전자 자기등가회로를 통해, 마그네틱 토크 성분을 구성하는 공극자속밀도 수식을 이끌어 낼 수 있다. 이를 통해, Spoke type PMSM은 마그네틱 토크가 주 토크이기 때문에, 공극 자속밀도 및 형상치수비를 이용하여 전동기의 크기를 계산하였다.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.172-173
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• 2017

본 논문은 벅 차동전력조절 회로가 적용 된 다출력 스위치드-커패시터 부스트 컨버터의 소신호 모델 분석에 대한 논문이다. 제안하는 회로는 각 태양광 모듈의 최대전력점을 추정하기 위해서 제어된다. 제안하는 회로는 상태 공간 평균화 기법과 시그널 플로우 그래프를 통해서 해석하였으며 PSIM과 MATLAB을 통해서 증명하였다.

• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.187-188
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• 2012

본 논문에서는 영전압 스위칭을 하고 브리지가 없는 부스트 역률 보상 회로를 제안한다. 제안하는 회로에서는 브리지 다이오드를 제거하여 도통 손실을 줄일 수 있다. 게다가, 스위치 내부 다이오드의 역회복 전류 문제를 줄여주고 스위치가 영전압 스위칭을 하므로 스위칭 손실을 크게 줄일 수 있다. 본 논문에서는 제안하는 회로의 이론적 해석 및 설계방법을 설명하고 실험결과를 통해 회로의 동작을 검증한다.

• Proceedings of the Korea Water Resources Association Conference
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• 2002.05a
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• pp.176-181
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• 2002

• Journal of the Korean Institute of Telematics and Electronics
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• v.8 no.4
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• pp.7-16
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• 1971

A negative resistance element in the form of current control can be obtained by using a pair transistor circuit. This negative resistance element can be used in the generation of square pulse, and also in the realization of pulse width modulation circuit by superposing signal current on its bias current. The each bias current of pair circuit increases alternatively according to the polarity of the input signal. In order to satisfy this condition, a modified full wave rectification circuit has been adopted for supplying the input signal. Theoritical analysis of pulse times and design guidances for practical modulation circuit parameters are presented.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.9
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• pp.2091-2096
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• 2013

This paper present a method of efficiency circuit design based on directed graph which was represented by tree structure relationship between input and output of nodes. In this paper, we introduce the concept of mathematical analysis based on tree structure which was designed by optimal localized computable circuit. Using the proposed circuit design algorithms in this paper, it is possible to design circuit which directed tree graph have any node number. The proposed method is more effective, regularity and extensibility than former method.

• The Journal of the Korea institute of electronic communication sciences
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• v.5 no.1
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• pp.17-22
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• 2010

Generally, there are Chua's Circuit, Lorenz Circuit and Duffing circuit in the chaos circuit. Among these chaos circuits, Chua's circuit is well known to make the electronic parts easily. Chua's circuit is the constitute of the linearelements. These are constitute of Resistor component(R), inductor component(L), capacitor(C), and nonlinear element which is constitute of nonlinear resistor. However, L element have a difficult problem to implement real hardware by using commercial parts. Due to this, it has a saturation characteristic. In this paper, we analyzed the simplified Chua's circuit which is replace L to C by PSPICE program. Because L element has a difficult problem to make a real hardware, L has a saturation characteristic and we also confirm this analysis as the result.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.11
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• pp.55-63
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• 1999

A new CMOS If Package design methodology is presented, analyzing the electrical characteristics of a package and its effects on the CMOS digital circuits. An analytical investigation of the package noise effects due to the simultaneous switching of the gates within a chip, i.e., simultaneous switching noise (SSN) is performed. Then not only are novel design formula to meet electrical constraints of the Package derived, but also package design methodology based on the formula is proposed. Further, in order to demonstrate the Proposed design methodology, the design results are compared with HSPICE (a general purpose circuit simulator) simulation for $0.3\mu\textrm{m}$-based CMOS circuits. According to the proposed design procedures, it is shown that the results have excellent agreements with those of HSPICE simulation.