• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.4
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• pp.743-749
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• 2003

By biasing the gate of cold-HEMT with a voltage slightly lower than the pinch-off point, a new small-signal modeling method that is free from gate degradation problem and requires no additional DC measurement is proposed in this paper. The method has shown excellent agreement between modeled and measured S-parameters up to 62 GHz at 49 different normal operating bias points.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.7
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• pp.1074-1078
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• 2002

In this paper, we designed double gate(DG) MOSFET structure which has main gate(MG) and two side gates(SG). We have simulated using TCAD simulator U .WOSFET have the main gate length of %m and the side gate length of 70nm. Then, u'e have investigated the pinch-off characteristics, drain voltage is changed from 0V to 1.5V at VMG=1.5V and VSG=3.0V. In spite of the LMG is very small, we have obtained a very good pinch-off characteristics. Therefore, we know that the DG structure is very useful at nano scale.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.11a
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• pp.498-501
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• 2002

In this paper, we designed double gate(DG) MOSFET structure which has main gate(MG) and two side gates(SG). We have simulated using TCAD simulator. DG MOSFET have the main gate length of nm and the side gate length of 70nm. Then, we have investigated the pinch-off characteristics, drain voltage is changed from 0V to 1.5V at VMG=1.5V and VSG=3.0V. In spite of the LMG is very small, we have obtained a very good pinch-off characteristics. Therefore, we know that the DG structure is very useful at nino scale.

• Electrical & Electronic Materials
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• v.6 no.6
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• pp.545-552
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• 1993

단층 금속 Al, Au 게이트 MESFET를 제작하여 열처리에 따른 쇼트키 계면에서의 상호확산 상태와 그에 따른 쇼트키 접촉특성 및 MESFET의 전기적 특성을 조사하였다. Al 및 Au 쇼트키 계면의 상호확산은 as-deposited 상태에서도 나타났으며 열처리 온도가 증가함에 따라 상호확산의 정도는 Au 접촉이 Al 접촉보다 컸다. 특히 Au 접촉에서 Ga의 외부확산이 현저했다 .Al 및 Au 게이트에 있어서 공통적으로 열처리 온도 증가에 따라 포화드레인 전류와 핀치오프 전압은 감소하였고 개방채널 저항은 증가하였으며 변화폭은 Au 게이트가 Al 게이트보다 컸다. Al 및 Au 접촉의 장벽높이는 as-deposited 상태에서 각각 0.70eV, 0.73eV로 페르미 준위는 1/2Eg 근처에 피닝되었다. Al 및 Au 접촉에 있어서 열처리 온도 증가에 따라 장벽높이는 각각 증가, 감소하였으며 이상계수는 각각 감소, 증가하였다. Al 접촉의 경우 열처리를 행함으로서 쇼트키 접촉특성이 개선됨을 확인할 수 있었다.

• Journal of Advanced Marine Engineering and Technology
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• v.32 no.8
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• pp.1263-1268
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• 2008

In this paper, the low noise power amplifier for GaAs FET ATF-10136 is designed and fabricated with active bias circuit and self bias circuit. To supply most suitable voltage and current, active bias circuit is designed. Active biasing offers the advantage that variations in the pinch-off voltage($V_p$) and saturated drain current($I_{DSS}$) will not necessitate a change in either the source or drain resistor value for a given bias condition. The active bias network automatically sets a gate-source voltage($V_{gs}$) for the desired drain voltage and drain current. Using resistive decoupling circuits, a signal at low frequency is dissipated by a resistor. This design method increases the stability of the LNA, suitable for input stage matching and gate source bias. The LNA is fabricated on FR-4 substrate with active and self bias circuit, and integrated in aluminum housing. As a results, the characteristics of the active and self bias circuit LNA implemented more than 13 dB and 14 dB in gain, lower than 1 dB and 1.1 dB in noise figure, 1.7 and 1.8 input VSWR at normalized frequency $1.4{\sim}1.6$, respectively.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.6
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• pp.383-389
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• 2001

We report on the design, fabrication, and characterization of 0.35${\mu}{\textrm}{m}$-gate AIGaAs/InGaAs PHEMTs for millimeter-wane applications. The epi-wafer structures were designed using ATLAS for optimum DC and AC characteristics, 0.351m-gate AIGaAs/rnGaAs PHEMTs having different gate widths and number of fingers were fabricated using electron beam lithography Dependence of RF characteristics of PHEMT on gate finger with and number of gate fingers have been investigated. PHEMT haying two 0.35$\times$60${\mu}{\textrm}{m}$$^2$ gate fingers showed the knee voltage, pinch-off voltage, drain saturation current density, and maximum transconductance of 1.2V, -1.5V, 275㎃/mm, and 260.17㎳/mm, respectively. The PHEMT showed fT(equation omitted)(current gain cut-off frequency) of 45㎓ and fmax(maximum oscillation frequency) of 100㎓. S$_{21}$ and MAG of the PHEMT were 3.6dB and 11.15dB, respectively, at 35㎓