• Journal of KIISE:Computing Practices and Letters
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• v.16 no.12
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• pp.1199-1203
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• 2010

Data transfer between host system and storage device is based on the data unit called sector, which can be varied depending on computer systems. If NAND flash memory is used as a storage device, the variant sector size can affect storage system performance since its operation is much related to sector size and page size. In this paper, we propose an efficient FTL mapping management scheme to support multiple sector size within one NAND flash memory based storage device, and analyze the performance effect and management overhead. According to the proposed scheme, the management overhead of proposed FTL management is lower than conventional scheme when various sector sizes are configured in computer systems, while performance is less degraded in comparison with single sector size support system.

• Journal of Digital Contents Society
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• v.8 no.4
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• pp.593-600
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• 2007

Small computer systems such as mobile devices adopt NAND flash memories as their storage media. However, DBMS running on such systems are optimized to hard disks. When small computer systems use DBMS they usually use additional system layer, like FTL, that emulates flash memories as normal hard disks and DBMS cannot control flash memories directly. In this paper, we propose unified storage system that DBMS controls flash memories directly. We implemented the system in a real environment and proved the proposed system outperforms legacy systems.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.9
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• pp.483-490
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• 2005

Recently, flash memory is widely used in embedded applications since it has strong points: non-volatility, fast access speed, shock resistance, and low power consumption. However, due to its hardware characteristics, it requires a software layer called FTL(flash translation layer). The main functionality of FTL is to convert logical addresses from the host to physical addresses of flash memory We present a new FTL algorithm called STAFF(State Transition Applied Fast Flash Translation Layer). Compared to the previous FTL algorithms, STAFF shows five times higher performance than basic block mapping scheme and requires less memory. We provide performance results based on our implementation of STAFF and previous FTL algorithms.

• Annual Conference of KIPS
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• 2007.05a
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• pp.885-888
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• 2007

본 논문은 무선 센서노드에서 측정되는 데이터들에 대한 저장 및 검색을 효율적으로 하기 위한 플래시 메모리 공간 관리 기법을 제안한다. 플래시 메모리는 외부 충격에 강하고, 비휘발성이며 접근이 빠른 장점이 있지만, 덮어쓰기 및 쓰기 횟수가 제한되는 단점이 있다. 이러한 특성으로 플래시 메모리는 기존의 저장매체와는 다른 관리 방법이 요구되었고 지금까지의 센서노드에서는 플래시 메모리를 사용 하지 않았다. 본 논문에서는 센서노드안의 플래시 메모리에서 순차적으로 측정되는 데이터를 관리하기 위해 LFS(Log-Structured File System)방식을 제안한다. 그리고 순차적으로 정렬된 데이터에 효율적인 검색방법을 제시하고, 이를 ZigbeX Mote의 TinyOS안에서 NesC로 구현하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.261-261
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• 2016

플래시 메모리 (flash memory)는 DRAM(dynamic racdom access memory)이나 SRAM(static random access memory)에 비해 소자의 구조가 매우 단순하기 때문에 집적도가 높아서 기기의 소형화가 가능하다는 점과 제조비용이 낮다는 장점을 가지고 있다. 또한, 전원을 차단하면 정보가 사라지는 DRAM이나 SRAM과 달리 전원이 꺼지더라도 저장된 정보가 지워지지 않는다는 특징을 가지고 있어서 ROM(read only memory)과 정보의 입출력이 자유로운 RAM의 장점을 동시에 가지기 때문에 활용도가 크다. 또한, 속도가 빠르고 소비전력이 작아서 USB 드라이브, 디지털 TV, 디지털 캠코더, 디지털 카메라, 휴대전화, 개인용 휴대단말기, 게임기 및 MP3 플레이어 등에 널리 사용되고 있다. 특히, 낸드(NAND)형의 플래시 메모리는 고집적이 가능하며 하드디스크를 대체할 수 있어 고집적 음성이나 화상 등의 저장용으로 많이 쓰이며 일정량의 정보를 저장해두고 작업해야 하는 휴대형 기기에도 적합하며 가격도 노어(NOR)형에 비해 저렴하다는 장점을 가진다. 최근에는 smart watch, wearable device 등과 같은 차세대 디스플레이 소자에 대한 관심이 증가함에 따라 투명하고 유연한 메모리 소자에 대한 연구가 다양하게 진행되고 있으며 유리나 플라스틱과 같은 기판 위에서 투명한 플래시 메모리를 형성하는 기술에 대한 관심이 높아지고 있다. 전하트랩형 (charge trap type) 플래시 메모리는 플로팅 게이트형 플래시 메모리와는 다르게 정보를 절연막 층에 저장하므로 인접 셀간의 간섭이나 소자의 크기를 줄일 수 있기 때문에 투명하고 유연한 메모리 소자에 적용이 가능한 차세대 플래시 메모리로 기대되고 있다. 전하트랩형 플래시메모리는 정보를 저장하기 위하여 tunneling layer, trap layer, blocking layer의 3층으로 이루어진 게이트 절연막을 가진다. 전하트랩 플래시 메모리는 게이트 전압에 따라서 채널의 전자가 tunnel layer를 통해 trap layer에 주입되어 정보를 기억하게 되는데, trap layer에 주입된 전자가 다시 채널로 빠져나가는 charge loss 현상이 큰 문제점으로 지적된다. 따라서 tunnel layer의 막질향상을 위한 다양한 열처리 방법들이 제시되고 있으며, 기존의 CTA (conventional thermal annealing) 방식은 상대적으로 높은 온도와 긴 열처리 시간을 가지고, RTA (rapid thermal annealing) 방식은 매우 높은 열처리 온도를 필요로 하기 때문에 플라스틱, 유리와 같은 다양한 기판에 적용이 어렵다. 따라서 본 연구에서는 기존의 열처리 방식보다 에너지 전달 효율이 높고, 저온공정 및 열처리 시간을 단축시킬 수 있는 마이크로웨이브 열처리(microwave irradiation, MWI)를 도입하였다. Tunneling layer, trap layer, blocking layer를 가지는 MOS capacitor 구조의 전하트랩형 플래시 메모리를 제작하여 CTA, RTA, MWI 처리를 실시한 다음, 전기적 특성을 평가하였다. 그 결과, 마이크로웨이브 열처리를 실시한 메모리 소자는 CTA 처리한 소자와 거의 동등한 정도의 우수한 전기적인 특성을 나타내는 것을 확인하였다. 따라서, MWI를 이용하면 tunnel layer의 막질을 향상시킬 뿐만 아니라, thermal budget을 크게 줄일 수 있어 차세대 투명하고 유연한 메모리 소자 제작에 큰 기여를 할 것으로 예상한다.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.6
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• pp.122-130
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• 2013

The demand and the supply are increasing sharply in accordance with the growth of the Memory Semiconductor Industry. The Flash Memory above all is being utilized substantially in the Industry of smart phone, the tablet PC and the System on Chip (SoC). The Flash Memory is divided into the NOR-type Flash Memory and the NAND-type Flash Memory. A lot of study such as the Built-In Self Test (BIST), the Built-In Self Repair (BISR) and the Built-In Redundancy Analysis (BIRA), etc. has been progressed in the NOR-type fash Memory, the study for the Built-In Self Test of the NAND-type Flash Memory has not been progressed. At present, the pattern test of the NAND-type Flash Memory is being carried out using the outside test equipment of high price. The NAND-type Flash Memory is being depended on the outside equipment as there is no Built-In Self Test since the erasure of block unit, the reading and writing of page unit are possible in the NAND-type Flash Memory. The Built-In Self Test equipped with 2 kinds of finite state machine based structure is proposed, so as to carry out the pattern test without the outside pattern test equipment from the NAND-type Flash Memory which carried out the test dependant on the outside pattern test equipment of high price.

• The KIPS Transactions:PartD
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• v.14D no.7
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• pp.719-726
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• 2007

Recently, NAND flash memory has been used for a storage device in various mobile computing devices such as MP3 players, mobile phones and laptops because of its shock-resistant, low-power consumption, and none-volatile properties. However, due to the very distinct characteristics of flash memory, disk based systems and applications may result in severe performance degradation when directly adopting them on flash memory storage systems. Especially, when a B-tree is constructed, intensive overwrite operations may be caused by record inserting, deleting, and its reorganizing, This could result in severe performance degradation on NAND flash memory. In this paper, we propose an efficient buffer management scheme, called IBSF, which eliminates redundant index units in the index buffer and then delays the time that the index buffer is filled up. Consequently, IBSF significantly reduces the number of write operations to a flash memory when constructing a B-tree. We also show that IBSF yields a better performance on a flash memory by comparing it to the related technique called BFTL through various experiments.

• Journal of KIISE
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• v.44 no.11
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• pp.1130-1137
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• 2017

The multi-leveling technique that stores multiple bits in a single memory cell has significantly improved the density of NAND flash memory along with shrinking processes. However, because of the side effects of the multi-leveling technique, the average write performance of MLC NAND flash memory is degraded more than twice that of SLC NAND flash memory. In this paper, we introduce existing cross-layer optimization techniques proposed to improve the performance of MLC NAND flash-based storages, and propose a new integration technique that overcomes the limitations of existing techniques by exploiting their complementarity. By fully exploiting the performance asymmetry in MLC NAND flash devices at the flash translation layer, the proposed technique can handle many write requests with the performance of SLC NAND flash devices, thus significantly improving the performance of NAND flash-based storages. Experimental results show that the proposed technique improves performance 39% on average over individual techniques.

• Journal of KIISE:Computing Practices and Letters
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• v.14 no.2
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• pp.201-205
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• 2008

The flash memory is widely used as a main storage of embedded devices. It is adopted as a storage of database as growing the capacity of the flash memory. We run TPC-C benchmark on various FTL algorithms. But, the database shows poor performance on flash memory because the characteristic of I/O requests is full random. In this paper, we show the performance of all existing FTL algorithms is very poor. Especially, the FTL algorithm known as good at small mobile equipment shows worst performance. In addition, the chip-inter leaving which is a technique to improve the performance of the flash memory doesn't work well. In this paper, we inform you the reason that we need a new FTL algorithm and the direction for the database in the future.

• Journal of Digital Contents Society
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• v.16 no.4
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• pp.535-543
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• 2015

Recently, NAND flash based storage devices are being used as a storage device in various fields through hiding the limitations of NAND flash memory and maximizing the advantages. In particular, those storage devices contain a software layer called Flash Translation Layer(FTL) to hide the "erase-before-write" characteristics of NAND flash memory. FTL includes the metadata for managing the data requested from host. That metadata is stored in internal memory because metadata is very frequently accessed data for processing the requests from host. Thus, if the power-loss occurs, all data in memory is lost. So metadata management scheme is necessary to store the metadata periodically and to load the metadata in the initialization step. Therefore we proposed the scheme which satisfies the core requirements for metadata management and efficient operation. And we verified the efficiency of proposed scheme by experiments.