• Journal of the Korean Society for Railway
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• v.13 no.6
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• pp.559-564
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• 2010

This paper proposes an advanced filter design to improve power quality of a head electric power (HEP) as a power conversion unit in centralized-power type electric railway vehicle. First of all, we have measured waveform of output power of transformer connected HEP to design the filter. Throughout experiment and simulation results, it is estimated that switching technique used HEP is advanced selected harmonic elimination PWM (SHEPWM) and the applied switching frequency is about 300Hz. In this paper, a filter to improve power quality considering estimated parameters is designed. As a result, the reduction of the magnitude of the overall harmonic is achieved and confirmed through simulations.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.2
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• pp.253-258
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• 2012

A computationally efficient interpolation filter with a low-distortion performance is a key component to utilize the naturally-sampled pulse width modulation (NPWM) in a digital domain. To realize the efficient interpolation filter, we propose a novel design based on the recently-proposed modified Farrow filter. The proposed filter shows a better pass-band distortion performance maintaining similar degree of complexity compared with the conventional Lagrange interpolation filter. We achieve the maximum distortion deviation of 10-3 dB to 20-kHz audible frequency range and distortion reduction of 1/6 times compared with the Lagrange interpolation filter.

• Journal of IKEEE
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• v.23 no.2
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• pp.461-468
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• 2019

A continuous-time Delta-Sigma ADC has various benefits; it does not require an explicit anti-aliasing filter, and it is able to handle wider-band signals with less power consumption in comparison with a discrete-time Delta-Sigma ADC. However, it inherently needs to sample the signal with a high-speed clock, necessitating a complex decimation filter that operates at high speed in order to convert the modulator output to a low-rate high-resolution digital signals without causing aliasing. This paper proposes a continuous-time Delta-Sigma ADC architecture that employs pulse-width modulation and shows that the proposed architecture lends itself to a simpler implementation of the decimation filter using a lookup table.

• Korean Journal of Optics and Photonics
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• v.11 no.5
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• pp.353-359
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• 2000

A harmonically mode-locked fiber ring laser cavlty was theoretically analyzed. The measured charactenstlcs of a 10 GHz erbium-doped fiber ring laser were used as a basis of the theoretical analysis. From the nonlinear Schroedinger equation of an actively mode-locked erblUm-doped fiber laser. the effects of the components inside the laser cavity have been analyzed includmg nonlinear effects from group-velocity dispersion (GVD) and self-phase modulation (SPM). Usmg the analysls. we have designed a laser cavity with minimum pulsewidth and chirp by changing the intracavity optical intensity and the bandwidth of the filter. In the new design, the chirp i, reduced by 2 times and the pulsewidth by 2A times. compared to the laser used in the experiment. iment.

• Proceedings of the KIPE Conference
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• 2019.11a
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• pp.43-45
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• 2019

펄스폭 변조 기법 (Pulse width modulation)을 사용하는 단상 인버터의 출력은 기본주파수 성분만이 아니라 고조파의 성분을 포함하고 있기 때문에 고조파 저감을 위한 필터의 사용이 필연적이다. LCL 필터는 기존의 L이나 LC 필터에 비해 시스템의 크기와 부피를 줄이며 동시에 전류 리플 감쇠 효율 등의 필터 성능이 뛰어나 최근 사용이 증가하는 추세이다. 본 논문에서는 LCL-필터의 인덕터에 알루미늄 권선을 적용하기위해 커패시터의 직렬 댐핑 저항과 더불어 인덕터의 권선 저항 또한 추가하여 필터의 전달함수를 고려하였다. 알루미늄은 구리 보다 전도율이 낮아 저항이 크지만, 구리에 비해 가볍고 가격이 저렴한 장점이 있다. 이를 계통 연계형 인버터에 적용하기 위해, 인덕터의 저항 성분 차이에 따른 댐핑(damping) 효과를 시뮬레이션을 통해 분석하였고 구리 권선과 알루미늄 권선을 사용한 인덕터를 각 제작하여 500 W 급 하드웨어 실험을 통해 전력변환장치에서의 알루미늄 권선 인덕터 적용 가능성을 확인하였다.

• The Transactions of the Korean Institute of Power Electronics
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• v.4 no.5
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• pp.462-473
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• 1999

This paper addresses the current measurement issue of all digital field oriented control of ac motors. The p paper focuses on the effect of low-pass filter and also on the sampling of the fundamental component of the m motor current. The low-pass filter, which suppresses the switching noise of the motor current, introduces v variable phase delay according to the current ripple frequency. It is shown that the current sampling error c consists of the fundamental component and high frL'quency ripple components. In this paper, the dependency of t this current sampling e$\pi$or on the reference voltage vector is investigated analytically and a sampling technique i is proposed to minimize the error. The work is based on the three phase symmetry pulse width modulation l inverter driving an induction machine. With this technique, the bandwidth of current regulator can be extended t to the limit given by the switching frequency of the inverter and more precise torque regulation is possible.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.39 no.3
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• pp.254-262
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• 1990

In the active power filter, the PWM method for controlling the power converter plays an important role for the performance and the efficiency of the filter. In this paper, a new PWM method for the single phase current source type active power filter is presented, which is intended particularly for obtaining the maximum efficiency of the compensation. This method is basically based upon the optimized injection method, but in contrast to the existing method, this method adapts the optimized injection method by putting not only the pulse width, but also the pulse position into control variables. By doing this, when the number of pulses per one cycle is N, lower order harmonics up to the Nth order can be completely eliminated by the filter. So, this method is much more efficient than any other existing method. These characteristics are well verified by the computer simulations and the experiments.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.3
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• pp.44-53
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• 2008

In this paper, we present the design of delta-sigma modulation-based class-D amplifier for driving headphones in portable audio applications. The presented class-D amplifier generates PWM(pulse width modulation) signals using a single-bit fourth-order high-performance delta-sigma modulator. To achieve a high SNR(signal-to-noise ratio) and ensure system stability, the locations of the modulator loop filter poles and zeros are optimized and thoroughly simulated. The test chip is fabricated using a standard $0.18{\mu}m$ CMOS process. The active area of the chip is $1.6mm^2$. It operates for the signal bandwidth from 20Hz to 20kHz. The measured THD+N(total harmonic distortion plus noise) at the $32{\Omega}$ load terminal is less than 0.03% from a 3V power supply.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.1
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• pp.7-16
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• 2015

The transmitter of quadrature multiplexed GMSK (QM-GMSK) is composed of two quadrature multiplexed GMSK modulators. QM-GMSK has a slightly increased spectrum main lobe compared with $Q^2PSK$ or QMSK, but it has highly suppressed side lobes. As a result, practical spectrum efficiency of QM-GMSK is achieved. By replacing the baseband elementary pulses of QM-GMSK with their approximate, the squared sinusoid of half-period, offset-$Q^2PSK$($OQ^2PSK$) is obtained. The $OQ^2PSK$ signal has similar spectral properties to QM-GMSK. The transmitter of $OQ^2PSK$ can be simply implemented without the Gaussian lowpass filter, which is required in QM-GMSK transmitter. In this paper, we propose an overlapped pulse shaping in $OQ^2PSK$ with RC(raised-cosine) or SRC(squared raised-cosine) pulses of length longer than the symbol period. Power spectrum of the proposed modulation scheme exhibits further suppressed side lobes, hence enhanced spectrum efficiency is obtained. Simulation results indicate that BER performance of the proposed scheme is comparable to that of $OQ^2PSK$.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.4
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• pp.707-714
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• 2016

Active driving safety systems for vehicle, such as the front collision avoidance, lane departure warning, and lane change assistance, have been popular to be adopted to the compact car. For improving performance and competitive cost, FMCW radar has been researched to adopt a phased array or a multi-beam antenna, and to integrate the front and the side radar. In this paper we propose several efficient methods to implement the signal processing module of FMCW radar system using low cost DSP. The pulse width modulation (PWM) based analog conversion, the approximation of time-eating functions, and the adoption of vector-based computation, etc, are proposed and implemented. The implemented signal processing board shows the real-time performance of 1.4ms pulse repetition interval (PRI) with 1024pt-FFT. In real road we verify the radar performance under real-time constraints of 10Hz update time.