• Title/Summary/Keyword: 패킹기법

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Effective Streaming System for Motion-JPEG on Embedded Environment (임베디드 환경의 효율적인 Motion-JPEG 스트리밍 기법)

  • Kim, Yong-Jin;Lee, Dong-Sik;Ko, Mi-Ae;Kim, Young-Mo
    • Proceedings of the Korea Information Processing Society Conference
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    • 2003.11a
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    • pp.527-530
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    • 2003
  • 본 논문에서는 제한요소가 많은 임베디드 환경에서의 실시간 Motion-JPEG 전송을 초점으로 하고 있으며, 현재에 얻어진 이미지와 이전의 이미지를 비교하여 움직임이 있는 부분의 블록만을 전송하는 시스템을 제안한다. 제안한 시스템에서는 처리시간과 처리 데이터 용량에서 이득을 얻기 위해 DCT 영역에서 두 영상을 블록 단위로 비교한다. 영상비교에 필요한 임계값 추출은 물체가 이미 지상에서 여러 픽셀과 블록에 연속적으로 존재하는 현상을 이용하여 계산된다. 비교 시 DCT 연산자체외 특징인 저주파로의 에너지 패킹현상을 이용하며 전체 DCT 계수들을 비교하지 않고 DC 성분을 포함한 일정 개수의 AC 성분만 사용한다.

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Two-dimensional bin packing optimization model for mother plate design (후판 날판설계를 위한 이차원 빈패킹 최적화 기법)

  • Park Sang-Hyeok;Jang Su-Yeong
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 2006.05a
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    • pp.137-142
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    • 2006
  • 제철소 후판공장에서는 두꺼운 슬라브(Slab)를 압연하여 사각형태의 철판인 날판(Mother Plate)을 생산하고, 이를 주문(Plate) 사이즈에 맞게 다시 절단을 하게 된다. 이때 동일 슬라브라 하더라도 압연방법에 따라 다양한 사이즈의 날판을 생산할 수 있다. 여기에서 다루고 있는 후판 날판설계 문제는 주어진 주문을 대상으로 최소 개수의 슬라브를 사용하여 생산하는 문제를 말한다. 이를 위해 최적의 날판 사이즈를 결정하고, 각 날판에 주문들을 배치하게 된다. 본 논문에서는 후판 날판설계문제를 two-stage guillotine cutting problem의 변이로 모델을 세우고, 이를 위한 효율적인 휴리스틱을 제시하였다. 그리고 실 데이터를 대상으로 컴퓨터 실험을 통해 휴리스틱을 효율성을 검정하였다.

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Construction of Database for IoT Firmware Exploit (IoT 펌웨어 취약점 데이터베이스 구축 방안 연구)

  • Lee, Kyeong Seok;Cho, Ho Mook
    • Proceedings of the Korean Society of Computer Information Conference
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    • 2020.07a
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    • pp.115-118
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    • 2020
  • 본 논문에서는 IoT 취약점 탐지 시스템과 취약점 데이터베이스 구축 방안을 제안한다. 동적 웹페이지 제어기술 기반의 크롤링 기법으로 펌웨어를 수집한 후, 패킹된 펌웨어 파일을 Binwalk, FMK를 활용하여 추출하고 Qemu 에뮬레이팅 기반의 실제 서비스를 실행시키는 시스템을 구현하여 펌웨어 취약점을 탐지할 수 있는 환경을 구축한다. 구축된 시스템을 통하여 수집, 추출, 에뮬레이팅 과정에서 생성된 데이터와 연계되어 탐지된 취약점 정보를 저장할 수 있는 데이터베이스를 제안한다. 제안된 시스템과 데이터베이스를 통하여 IoT 기기 펌웨어의 취약점을 탐지하고 예방을 할 수 있을 것이라 기대한다.

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Timing Driven Analytic Placement for FPGAs (타이밍 구동 FPGA 분석적 배치)

  • Kim, Kyosun
    • Journal of the Institute of Electronics and Information Engineers
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    • v.54 no.7
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    • pp.21-28
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    • 2017
  • Practical models for FPGA architectures which include performance- and/or density-enhancing components such as carry chains, wide function multiplexers, and memory/multiplier blocks are being applied to academic FPGA placement tools which used to rely on simple imaginary models. Previously the techniques such as pre-packing and multi-layer density analysis are proposed to remedy issues related to such practical models, and the wire length is effectively minimized during initial analytic placement. Since timing should be optimized rather than wire length, most previous work takes into account the timing constraints. However, instead of the initial analytic placement, the timing-driven techniques are mostly applied to subsequent steps such as placement legalization and iterative improvement. This paper incorporates the timing driven techniques, which check if the placement meets the timing constraints given in the standard SDC format, and minimize the detected violations, with the existing analytic placer which implements pre-packing and multi-layer density analysis. First of all, a static timing analyzer has been used to check the timing of the wire-length minimized placement results. In order to minimize the detected violations, a function to minimize the largest arrival time at end points is added to the objective function of the analytic placer. Since each clock has a different period, the function is proposed to be evaluated for each clock, and added to the objective function. Since this function can unnecessarily reduce the unviolated paths, a new function which calculates and minimizes the largest negative slack at end points is also proposed, and compared. Since the existing legalization which is non-timing driven is used before the timing analysis, any improvement on timing is entirely due to the functions added to the objective function. The experiments on twelve industrial examples show that the minimum arrival time function improves the worst negative slack by 15% on average whereas the minimum worst negative slack function improves the negative slacks by additional 6% on average.

An Improvement of Lossless Image Compression for Mobile Game (모바일 게임을 위한 개선된 무손실 이미지 압축)

  • Kim Se-Woong;Jo Byung-Ho
    • The KIPS Transactions:PartB
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    • v.13B no.3 s.106
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    • pp.231-238
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    • 2006
  • In this paper, the method to make lossless image compression that holds considerable part of total volume of mobile game has been proposed. To increase the compression rate, we compress the image by Deflate algorithm defined in RFC 1951 after reorganize it at preprocessing stage before conducting actual compression. At the stage of preprocessing, we obtained the size of a dictionary based on the information of image which is the feature of Dictionary-Based Coding, and increased the better compression rate than compressing in a general manner using in a way of restructuring image by pixel packing method and DPCM prediction technique. It has shown that the method increased 9.7% of compression rate compare with existing mobile image format, after conducting the test of compression rate applying the suggested compression method into various mobile games.

Pre-Packing, Early Fixation, and Multi-Layer Density Analysis in Analytic Placement for FPGAs (FPGA를 위한 분석적 배치에서 사전 패킹, 조기 배치 고정 및 밀도 분석 다층화)

  • Kim, Kyosun
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.10
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    • pp.96-106
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    • 2014
  • Previous academic research on FPGA tools has relied on simple imaginary models for the targeting architecture. As the first step to overcome such restriction, the issues on analytic placement and legalization which are applied to commercial FPGAs have been brought up, and several techniques to remedy them are presented, and evaluated. First of all, the center of gravity of the placed cells may be far displaced from the center of the chip during analytic placement. A function is proposed to be added to the objective function for minimizing this displacement. And then, the density map is expanded into multiple layers to accurately calculate the density distribution for each of the cell types. Early fixation is also proposed for the memory blocks which can be placed at limited sites in small numbers. Since two flip-flops share control pins in a slice, a compatibility constraint is introduced during legalization. Pre-packing compatible flip-flops is proposed as a proactive step. The proposed techniques are implemented on the K-FPGA fabric evaluation framework in which commercial architectures can be precisely modeled, and modified for enhancement, and validated on twelve industrial strength examples. The placement results show that the proposed techniques have reduced the wire length by 22%, and the slice usage by 5% on average. This research is expected to be a development basis of the optimization CAD tools for new as well as the state-of-the-art FPGA architectures.

The Synchronization Method of System Time Clock between Encoder and Decoder on MPEG-2 System Layer (MPEG-2 시스템계층의 엔코더와 디코더 간 System Time Clock 동기화 기법)

  • Seo Hee-Don;Kie Jae-Hoon
    • Journal of Korea Multimedia Society
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    • v.8 no.10
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    • pp.1403-1410
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    • 2005
  • The synchronization problem is directly related to the quality of service in multimedia communication and especially in real-time communication. In this study, we found the cause of clock fluctuation between encoder and decoder in MPEG-2 system layer was that the standard decoder design only considered a fixed time delay component. To solve it, we proposed Extended-SRTS algorithm, which uses STC as service clock by synchronizing transport stream. As the result, we can improve the effect of frequency-drift, time-varying-network-jitter and packing-jitter and so on And by virtue of this algorithm, we can make low the dependency of network clock, which makes easy to synchronize and connect transparently at the ends point, we expect the proposed algorithm can be widely applied to the field of real -time multimedia communications.

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Identification of Attack Group using Malware and Packer Detection (악성코드 및 패커 탐지를 이용한 공격 그룹 판별)

  • Moon, Heaeun;Sung, Joonyoung;Lee, Hyunsik;Jang, Gyeongik;Kwak, Kiyong;Woo, Sangtae
    • Journal of KIISE
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    • v.45 no.2
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    • pp.106-112
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    • 2018
  • Recently, the number of cyber attacks using malicious code has increased. Various types of malicious code detection techniques have been researched for several years as the damage has increased. In recent years, profiling techniques have been used to identify attack groups. This paper focuses on the identification of attack groups using a detection technique that does not involve malicious code detection. The attacker is identified by using a string or a code signature of the malicious code. In addition, the detection rate is increased by adding a technique to confirm the packing file. We use Yara as a detection technique. We have research about RAT (remote access tool) that is mainly used in attack groups. Further, this paper develops a ruleset using malicious code and packer main feature signatures for RAT which is mainly used by the attack groups. It is possible to detect the attacker by detecting RAT based on the newly created ruleset.

Evaluation of Ground-Water Sampling Techniques for Analysis of Chlorofluorocarbons (지하수의 CFCs(Chlorofluorocarbons) 조사를 위한 시료 채취 방법의 평가)

  • 고동찬;이대하
    • Journal of Soil and Groundwater Environment
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    • v.8 no.2
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    • pp.1-8
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    • 2003
  • Two types of ground-water sampling techniques for CFCs (chlorofluorocarbons) analysis, the cold-welded copper tube method and flame-sealed borosilicate glass ampule method, were compared and evaluated. CFCs concentrations by the copper tube method showed a poor reproducibility among triplicates whereas those by the glass ampule method showed a good agreement and relative standard deviations of triplicates were less than 5%. The poor reproducibility of the copper tube method appears to be attributed to the incomplete sealing in connection between faucets of wellhead and the sampling apparatus. The copper tube method also showed higher CFCs concentrations than the glass ampule method, which is more pronounced for CFC-11 than for CFC-12. The plastic tubings and rubber gasket of faucets in case of the copper tube method possibly contaminated the samples with CFC-11 and CFC-12. The potential of CFCs contamination for the glass ampule method was eliminated by using stainless steel and Nylon only and by connecting the sampling equipment directly to the main discharge pipe of wellhead. The validity of the glass ampule method were also verified by detecting very low level of CFCs for the ground-water sample which is old enough to have negligible CFCs.

Flexible Formation Algorithm for Multiple UAV Using the Packing (패킹을 이용한 다수 무인기의 유동적 대형 형성 알고리즘)

  • Kim, Hyo-Jung;Kim, Jeong-Hun;Kim, Moon-Jung;Ryoo, Chang-Kyung
    • Journal of Advanced Navigation Technology
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    • v.25 no.3
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    • pp.211-216
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    • 2021
  • Multiple UAV System has been used for various purposes such as reconnaissance, networking and aerial photography. In such systems, it is essential to form and maintain the formation of multiple UAVs. This paper proposes the algorithm that produces an autonomous distributed control for each vehicle for a flexible formation. This command is a repulsive force in the form of the second-order system by the nearest UAV or mission area. The algorithm uses the relative position/speed through sensing and communication for calculating the command without external intervention. The command allows each UAV to follow the reference distance and fill the mission area as densely as possible without overlapping. We determine the reference distance via optimization technique solving the packing problem. The mission area comprises the desired formation outline and can be set flexibly depending on the mission. Numerical simulation is carried out to verify the performance of the proposed algorithm under a complex and flexible environment. The formation is formed in 26.94 seconds and has a packing density of 71.91%.