• 제목/요약/키워드: 패키지균열

검색결과 23건 처리시간 0.025초

반도체패키지에서의 층간박리 및 패키지균열에 대한 파괴역학적 연구 (2) - 패키지균열- (A Fracture Mechanics Approach on Delamination and Package Crack in Electronic Packaging(ll) - Package Crack -)

  • 박상선;반용운;엄윤용
    • 대한기계학회논문집
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    • 제18권8호
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    • pp.2158-2166
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    • 1994
  • In order to understand the package crack emanating from the edge of leadframe after the delamination between leadframe and epoxy molding compound in an electronic packaging of surface mounting type, the M-integral and J-integral in fracture mechanics are obtained. The effects of geometry, material properties and molding process temperature on the package crack are investigated taking into account the temperature dependence of the material properties, which simulates a more realistic condition. If the temperature dependence of the material properties is considered the result of analysis conforms with observations that the crack is kinked at between 50 and 65 degree. However, in case of constant material properties at the room temperature it is found that the J-integral is underestimated and the kink crack angle is different form the observation. The effects of the material properties and molding process temperature on J-integral and crack angle are less significant that the chip size for the cases considered here. It is suggested that the geometric factors such as ship size, leadframe size are to be well designed in order to prevent(or control) the occurrence and propagation of the package crack.

경계요소법에 의한 반도체 패키지의 균열진전경로 예측 (Prediction of crack propagation path in IC package by BEM)

  • 송춘호;정남용
    • 대한기계학회:학술대회논문집
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    • 대한기계학회 2001년도 춘계학술대회논문집A
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    • pp.286-291
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    • 2001
  • Applications of bonded dissimilar materials such as IC package, ceramic/metal and resin/metal bonded joints, are very increasing in various industry fields. It is very important to analyze the thermal stress and stress singularity at interface edges in bonded joints of dissimilar materials. In orer to understand the package crack emanating from the edge of Die pad and Resin, fracture mechanics of bonded dissimilar materials and material properties are obtained. In this paper, the thermal stress and its singularity index for the IC package were analyzed using 2-dimensional elastic boundary element method. Crack propagation angle and path by thermal stress were numerically simulated with boundary element method.

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반도체 패키지의 경계요소법에 의한 균열진전경로의 예측 (Prediction of Crack Propagation Path Using Boundary Element Method in IC Packages)

  • 정남용
    • 한국자동차공학회논문집
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    • 제16권3호
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    • pp.15-22
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    • 2008
  • Applications of bonded dissimilar materials such as integrated circuit(IC) packages, ceramics/metal and resin/metal bonded joints, are very increasing in various industry fields. It is very important to analyze the thermal stress and stress singularity at interface edge in bonded joints of dissimilar materials. In order to investigate the IC package crack propagating from the edge of die pad and resin, the fracture parameters of bonded dissimilar materials and material properties are obtained. In this paper, the thermal stress and its singularity index for the IC package were analyzed using 2-dimensional elastic boundary element method(BEM). From these results, crack propagation direction and path by thermal stress in the IC package were numerically simulated with boundary element method.

다꾸찌방법을 사용한 여러변수들이 패키지균열에 미치는 신뢰도 평가 (Estimate of package crack reliabilities on the various parameters using taguchi's method)

  • 권용수;박상선;박재완;채영석;최성렬
    • 대한기계학회논문집A
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    • 제21권6호
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    • pp.951-960
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    • 1997
  • Package crack caused by the soldering process in the surface mounting plastic package is evaluated by applying the maximum energy release rate criterion. It could be shown that the crack propagation from the lower edge of the ie pad is easily occurred at the maximum temperature during the soldering process, where the pressure acting on the crack surface is assumed by the saturated vapor pressure at maximum temperature. The package crack formation depends on various parameters such as chip size, relative thickness, material properties, the moisture content and soldering temperature etc. The quantitative measure of the effects of the parameters could be easily obtained by using the taguchi's method which requires only a few kinds of combinations with such parameters. From the results, it could be obtained that the more significant parameters to effect the package reliability are the orders of Young's modulus, die pad size, down set, chip thickness and maximum soldering temperature.

비전도성 접착제가 사용된 플립칩 패키지의 신뢰성에 관한 연구 (Characteristics of Reliability for Flip Chip Package with Non-conductive paste)

  • 노보인;이종범;원성호;정승부
    • 마이크로전자및패키징학회지
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    • 제14권4호
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    • pp.9-14
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    • 2007
  • 본 연구에서는 가속화 조건에서의 비전도성 접착제가 사용된 플립칩 패키지의 열적 신뢰성에 관하여 평가하였다. 실리콘 칩에 $17{\mu}m$두께의 Au 범프를 형성하고 무전해 Ni/Au 도금과 Cu 패드의 두께가 각각 $5{\mu}m$$25{\mu}m$로 형성된 연성 기판을 사용하여 플립칩 패키지를 형성하였다. 유리전이온도가 $72^{\circ}C$인 비전도성 접착제를 사용하여 플립칩을 접합시킨 후 열충격 시험과 항온항습 시험을 실시하였다. 열충격 싸이클과 항온항습 유지 시간이 증가할수록 플립칩 패키지의 전기 저항이 증가하는 것을 확인할 수 있었다. 이는 Au 범프와 Au 범프 사이의 균열, 칩과 비전도성 접착제 또는 기판과 비전도성 접착제 사이의 층간 분리에 의한 것으로 사료된다. 또한 항온항습 하에서의 전기 저항의 변화가 열충격하에서 보다 큰 것을 확인할 수 있었다. 따라서 비전도성 접착제가 사용된 플립칩 패키지는 온도보다 습기에 더욱 민감하다는 것을 알 수 있었다.

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반도체패키지에서의 층간박리 및 패키지균열에 대한 파괴역학적 연구 (1) -층간박리- (A Fracture Mechanics Approach on Delamination and Package Crack in Electronic Packaging(l) -Delamination-)

  • 박상선;반용운;엄윤용
    • 대한기계학회논문집
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    • 제18권8호
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    • pp.2139-2157
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    • 1994
  • In order to understand the delamination between leadframe and epoxy molding compound in an electronic packaging of surface mounting type, the stress intensity factor, T-stress and J-integral in fracture mechanics are obtained. The effects of geometry, material properties and molding process temperature on the delamination are investigated taking into account the temperature dependence of the material properties, which simulates as more realistic condition. As the crack length increases the J-integral increases, which suggest that the crack propagates if it starts growing from the small size. The effects of the material properties and molding process temperature on stress intensity factor, T-stress is and J-integral are less significant than the chip size for the practical cases considered here. The T-stress is negative in all eases, which is in agreement with observation that interfacial crack is not kinked until the crack approaches the edge of the leadframe.

플라스틱 IC 패키지의 습열 파괴 해석 (Hygrothermal Cracking Analysis of Plastic IC Package)

  • 이강용;양지혁
    • 한국정밀공학회지
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    • 제15권1호
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    • pp.51-59
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    • 1998
  • The purposes of the paper are to consider the failure phenomenon based on delamination and crack when the encapsulant of plastic IC package under hygrothermal loading in the IR soldering process is on elastic and viscoelastic behavior due to the temperature and to show the optimum design using fracture mechanics. The model for analysis is the plastic SOJ package with a dimpled diepad. The package model with the perfect delamination between chip and diepad is chosen to estimate the resistance to fracture by calculating J-integrals in low temperature and C(t)-integrals in high temperature with the change of the design under hygrothermal loading. The optimum design to depress the delamination and crack in the plastic IC package is presented.

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열하중하에 있는 IC 패키지의 점탄성 파괴해석 (Visco-Elastic Fracture Analysis of IC Package under Thermal Loading)

  • 이강용;양지혁
    • 한국정밀공학회지
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    • 제15권1호
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    • pp.43-50
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    • 1998
  • The purpose of the paper is to protect the damage of plastic IC package with searching the cause of the fracture due to the delamination and crack when the encapsulant of plastic IC package is on viscoelastic behavior with the effect of creep on high temperature, The model for analysis is the plastic SOJ package with dimpled diepad in the IR soldering process of surface mounting technology. The risk of delamination with calculating the distribution of viscoelastic thermal stress in the package without the crack in the surface mounting process is checked. The package model with the perfect delamination between chip and diepad is chosen to estimate the resistance against fracture in thermal loading with calculating C (t)-integrals according to the change of the design. The optimum design to depress the delamination and crack is presented.

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반도체 패키지의 층간박리 파괴역학인자 해석 및 균열진전경로 예측 (Analyses of Fracture Parameters and Prediction of Crack Propagation Path on Delamination in the LSI Package)

  • 정남용;박철희
    • 한국생산제조학회지
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    • 제18권4호
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    • pp.401-409
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    • 2009
  • This paper presents a method of calculating the stress intensity factor (K) and crack propagation direction (${\theta}_0$) at the crack-tip that is associated with delamination in the large scale integration(LSI) package. To establish a reasonable strength evaluation method and life prediction, it is necessary to assess fracture parameters under various fracture conditions. Therefore, we conducted quantitative stress singularity analysis considering thermal stress simulating the changes of crack length (a), (h) and (v) in delamination using the 2-dimensional elastic boundary element method (BEM), and from these results predicted crack propagation direction and path.

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