• Journal of the Institute of Electronics Engineers of Korea SC
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• v.39 no.2
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• pp.116-122
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• 2002

A timing signal board which can be used to analyze EA effect for coherent radar systems is introduced. It is capable of generating the timing signals that are needed for EA test about radar systems in real time. Its function to generate baseband target signal makes it easy to analyze EA effect. Because all parameters of timing signals can be changed by software, it is very easy to configure many kinds of test scenarios.

• Proceedings of the Korean Information Science Society Conference
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• 2007.10c
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• pp.375-379
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• 2007

고성능 VLSI 설계 시 배치 후를 포함한 전체적인 설계 과정이 완성되기 전까지는 물리적인 정확한 설계의 특성은 배치 단계에서는 알기 어렵다. 따라서 주어진 성능 (시간적 제약조건)을 만족하는, 즉, timing-driven placement (타이밍이 고려된 배치)는 1.0 미크론 이하의 초미세한 설계에서 중요하게 되었다. 타이밍을 고려한 배치는 초기 레이아웃 디자인 단계에서 타이밍 제약조건에 의해 디자인 반복을 줄인다. 하지만 대부분의 배치 단계의 디자인 모델은 배치단계에서 기하학적인 면을 고려하여 최대허용 지연시간 (Slack 이라고 부름)과 같은 물리적인 디자인 효과를 분석하기 어려운데 이것은 물리적으로 정확한 특성이 이 단계에서 알려지지 않기 때문에 당연한 결과이다. 본 논문에서는 기하적인 요소를 고려한 Slack의 재분배의 이점을 이용하여 허용 지연시간 처리의 혁신적인 방법을 제안한다. 제안된 접근법은 timing-closed 솔루션을 쉽게 찾는데 도움을 주고 이는 디자인을 반복하는 시간을 절약할 수 있게 한다.

• Journal of the Korean Institute of Intelligent Systems
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• v.10 no.5
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• pp.478-486
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• 2000

This paper proposes a design method that can minimize the power dissipation of CMOS digital circuits without affecting their optimal operation speeds. The proposed method is based on genetic algorithms(GAs) combined to the retiming technique, a circuit transformation technique of repositioning flip-flops. The proposed design method consists of two phases: the phase of retiming for optimizing clock periods and the phase of GA retiming for minimizing power dissipation. Experimental results using Synopsys Design Analyzer show that the proposed design method can reduce the critical path delay of example circuits by about 30-50% and improve the dynamic power performance of the circuits by about 1.4~18.4%.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2011.11a
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• pp.74-77
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• 2011

본 논문에서는, 지상파 3D HDTV 방송 전송을 위한 VSB(Vestigial Side Band) 변조방식의 심벌 타이밍 및 반송파 동기부 구조를 제안하고 그 성능을 검증해 보았다. 제안하는 동기부의 동작은 다음과 같다. 먼저 반송파 주파수 옵셋에 독립적인 심벌 타이밍 복구 알고리즘으로 타이밍 동기를 이룬다. 그리고 제안하는 프레임 검출 방법으로 프레임의 시작점을 알아내고, 반송파 주파수 옵셋 복구에 필요한 훈련 열을 얻어낸다. 마지막으로, 얻어진 훈련 열을 이용하여 반송파 주파수 옵셋과 반송파 위상 옵셋을 복구한다. 컴퓨터 모의실험 결과, 제안하는 동기부 구조는 이상적으로 동기를 이루었을 때의 BER(bit error rate)성능과 근접한 성능을 나타내었다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39C no.9
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• pp.870-879
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• 2014

In this paper, we propose an initial timing acquisition algorithm for terrestrial cloud transmission (CTxn) systems. By combining auto-correlations of several repetition patterns within preamble symbols, the proposed scheme can improve the reliability of the timing metric for CTxn system with co-channel interferences. Simulation results show that the proposed scheme improves the reliability of the timing metric for terrestrial CTxn systems.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.10A
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• pp.992-1003
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• 2007

In this paper, a channel estimation technique based on pilot tones, which does not degrade channel estimation performance even with the existence of symbol timing offset (STO) in OFDM systems, is proposed. The proposed technique performs channel estimation by interpolating channels with respect to amplitude and phase with a minimum computational complexity, differently from the conventional interpolation techniques. The proposed technique requires neither the estimation of fine STO in advance nor trigonometric operation for phase interpolation, signifying a significant reduction in computational complexity. Since the performance of the proposed technique does not depend on the STO present in OFDM systems. It can be directly applied to the following areas in OFDM-based communication system: elimination of fine STO estimation step in the synchronization procedure, elimination of STO estimation step in multiuser uplink, and channel estimation in multi-hop relay system. It is verified by computer simulation that the proposed technique can improve the performance of channel estimation significantly in the presence of STOs, compared with previous channel estimation techniques based on pilot tones.

• Journal of Music and Human Behavior
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• v.21 no.2
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• pp.1-30
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• 2024

The purpose of this study is to develop a rhythm-based music intervention protocol to enhance timing regulation in children with ADHD and investigate its feasibility. For this purpose, a three-phase study was conducted involving ADHD children and typically developing children. In the first phase, group-specific baseline measurements were taken for auditory attention (KAT), motor timing, and perceptual timing. In the second phase, a rhythm-based music intervention protocol incorporating key factors was developed. In the third phase, the developed protocol was applied to ADHD children to investigate the variables affecting timing regulation and to verify its effectiveness. Results from the first phase revealed significant differences in the timing values of children with ADHD, particularly in tasks requiring discrimination of sound duration and precision in rhythm patterns. Additionally, exploratory factor analysis of KAT results and motor/perceptual timing identified three clusters: attentional responsiveness, attentional synchronization, and attentional sophistication. In the second phase, a protocol consisting of tasks involving synchronization, attentional shifting, and rhythm production at various difficulty levels was developed and validated for expert validity. In the third phase, individual application of the protocol to children with predominantly inattentive and hyperactive-impulsive ADHD subtypes demonstrated changes in timing regulation tasks. This study provided basic data for using rhythm as an effective facilitation tool that leads from voluntary to involuntary attention in children with ADHD.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.7
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• pp.21-28
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• 2017

Practical models for FPGA architectures which include performance- and/or density-enhancing components such as carry chains, wide function multiplexers, and memory/multiplier blocks are being applied to academic FPGA placement tools which used to rely on simple imaginary models. Previously the techniques such as pre-packing and multi-layer density analysis are proposed to remedy issues related to such practical models, and the wire length is effectively minimized during initial analytic placement. Since timing should be optimized rather than wire length, most previous work takes into account the timing constraints. However, instead of the initial analytic placement, the timing-driven techniques are mostly applied to subsequent steps such as placement legalization and iterative improvement. This paper incorporates the timing driven techniques, which check if the placement meets the timing constraints given in the standard SDC format, and minimize the detected violations, with the existing analytic placer which implements pre-packing and multi-layer density analysis. First of all, a static timing analyzer has been used to check the timing of the wire-length minimized placement results. In order to minimize the detected violations, a function to minimize the largest arrival time at end points is added to the objective function of the analytic placer. Since each clock has a different period, the function is proposed to be evaluated for each clock, and added to the objective function. Since this function can unnecessarily reduce the unviolated paths, a new function which calculates and minimizes the largest negative slack at end points is also proposed, and compared. Since the existing legalization which is non-timing driven is used before the timing analysis, any improvement on timing is entirely due to the functions added to the objective function. The experiments on twelve industrial examples show that the minimum arrival time function improves the worst negative slack by 15% on average whereas the minimum worst negative slack function improves the negative slacks by additional 6% on average.

• The Optical Journal
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• s.130
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• pp.68-71
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• 2010

눈에 띄는 인상적인 사진을 만들기 위해서는 명도와 색상 대비를 통해 주제를 강조하는 방법, 타이밍, 보조피사체 등을 이용한 다양한 방법들이 있다. 그 중 색상 대비란 조합된 색에 의해 주제가 시각적으로 두드러지게 나타나는 것을 말하면 명도 대비는 주변의 발기와 주제의 밝기가 대비를 이뤄 주제가 배경으로부터 돋보이도록 만드는 기법을 말한다. 특히 하나의 움직임 속에서 서로가 균형을 이루고 있는 단 하나의 순간을 찾아내는 타이밍 또한 인상적인 사진을 만드는 요건이다.

• Cartoon and Animation Studies
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• s.27
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• pp.79-97
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• 2012

Comic book readers have respectively different reading speed and this means that time in comics is translated by readers' view. The authors arrange panels and gutters to control time, but time recognition in comics depends on the readers and generally it is the readers' role. On the contrary, the phenomenon having occurred by infinite canvas varied the authority of timing. Infinite canvas can give the comic book authors more authority of controlling timing than the readers by intervening in readers' relative time as an agents and transforming their fictive time into absolute time. Following to the concept of "Agency" in games, agency is the power which satisfies the players by reemergence of their intentions. Since some of digital comics absorbed the properties of other media such as animation and sound, we can see that the reader's timing agency is shifted to the author's timing agency. The purpose of this study is to analyse this phenomenon and to remind that agency motivated by the balance between material constraints and formal constraints becomes a condition of readability of digital comics but excessive timing constraints given to the readers causes a decrease of the readers' timing agency. This also can be a considerable matter when we produce digital comics.