• Title/Summary/Keyword: 타원공

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A Study on the Design of a New Rotor in Internal Pumps (내부 펌프의 새로운 로버 설계에 관한 연구)

  • Chang, Young-June;Kim, Jae-Hun;Han, Seung-Moo;Kim, Chul
    • Journal of the Korean Society for Precision Engineering
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    • v.24 no.3 s.192
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    • pp.100-107
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    • 2007
  • A internal lobe pump is suitable for oil hydraulics of machine tools, automotive engines, compressors, constructions and other various applications. In particular, the pump is an essential machine element of an automotive engine to feed lubricant oil. The subject of this paper is the theoretical analysis of internal lobe pump whose the main components are the rotors: usually the outer one is characterized by lobes with circular shape, while the inner rotor profile is determined as conjugate to the other. The topic of this paper is the design of a new rotor, which is based on specific performance as different types depending on the shape of the lobe of the outer rotor. First, the design of internal lobe pumps with circular, elliptical, and their combined lobe profiles is considered. The latter is a new type of lobe profile with special shape whose curvature follows a definite function. Then we introduce the performance indexes used for the comparison. Some of these indexes, such as flow rate and flow rate irregularity, are commonly used for the comparison, while specific slipping is particularly suitable in this case. It is possible to notice that the circular and elliptical type is comparable to the circular one or the elliptical one in terms of flow rate irregularity, but has improved performance in terms of specific slipping. Results obtained from the analysis enable the designer and manufacturer of oil pump to be more efficient in this field.

Study on the Strategy of Muscular Activity for Motor Track of Upper Limbs during Rowing Exercise (로잉운동 시 상지 운동궤적에 따른 근육활성 전략에 관한 연구)

  • Kang, S.R.;Kim, U.R.;Moon, D.A.;Kwon, T.K.
    • Journal of rehabilitation welfare engineering & assistive technology
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    • v.7 no.2
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    • pp.91-99
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    • 2013
  • The purpose of this study was to investigate the muscular activity and muscle strength for swing track of upper limbs during rowing exercise. Subject was all twenty healthy adults and they were divided into linear exercise group and elliptical exercise group in random. Subjects performed rowing exercise 3-times for a week and performed all 8-weeks. We measured realtime-surface EMG. Also we measured joint torque of elbow, ankle and lumbar in subjects using BIODEX. The result showed that when rowing exercise, elliptical track exercise had higher muscular activity in trapezius, deltoid, erector spinae, rectus femoris, biceps femoris, gastronemius than linear track exercise on more many muscle of upper and lower limbs. Also elbow joint torque and lumbar joint torque was more higher too. but linear exercise also had higher muscular activity in multifidus, tibilalis anterior than elliptical track exercise. According to this experiment, we found out that elliptical track was more efficient than linear track.

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Hardware Implementation of Elliptic Curve Scalar Multiplier over GF(2n) with Simple Power Analysis Countermeasure (SPA 대응 기법을 적용한 이진체 위의 타원곡선 스칼라곱셈기의 하드웨어 구현)

  • 김현익;정석원;윤중철
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.9
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    • pp.73-84
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    • 2004
  • This paper suggests a new scalar multiplication algerian to resist SPA which threatens the security of cryptographic primitive on the hardware recently, and discusses how to apply this algerian Our algorithm is better than other SPA countermeasure algorithms aspect to computational efficiency. Since known SPA countermeasure algorithms have dependency of computation. these are difficult to construct parallel architecture efficiently. To solve this problem our algorithm removes dependency and computes a multiplication and a squaring during inversion with parallel architecture in order to minimize loss of performance. We implement hardware logic with VHDL(VHSIC Hardware Description Language) to verify performance. Synthesis tool is Synplify Pro 7.0 and target chip is Xillinx VirtexE XCV2000EFGl156. Total equivalent gate is 60,508 and maximum frequency is 30Mhz. Our scalar multiplier can be applied to digital signature, encryption and decryption, key exchange, etc. It is applied to a embedded-micom it protects SPA and provides efficient computation.

An Implementation on the Computing Algorithm for Inverse Finite Field using Composite Field (합성체를 이용한 유한체의 역원 계산 알고리즘 구현)

  • Noh Jin-Soo;Rhee Kang-Hyeon
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.43 no.3 s.309
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    • pp.76-81
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    • 2006
  • Recently, Finite field is applied the cryptography in the modern multimedia communication. Especially, block codes such as Elliptic Curve Cryptosystem and Reed-Solomon code among the error correcting codes are defined with finite field. Also, finite field algorithm is conducting the research actively because many kind of application parts need the real time operating ability therefore the exclusive hardware have been implementing. In this paper, we proposed the inverse finite field algorithm over GF($2^8$) using finite composite field and implemented in a hardware, and then compare this hardware with the currently used 'Itoh and Tsujii' hardware in respect to structure, area and computation time. Furthermore, this hardware was inserted into the AES SubBytes block and implemented on FPGA emulator board to confirm that the superiority of the proposed algorithm through the performance evaluation.

Efficient systolic VLSI architecture for division in $GF(2^m)$ ($GF(2^m)$ 상에서의 나눗셈연산을 위한 효율적인 시스톨릭 VLSI 구조)

  • Kim, Ju-Young;Park, Tae-Geun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.3 s.357
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    • pp.35-42
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    • 2007
  • The finite-field division can be applied to the elliptic curve cryptosystems. However, an efficient algorithm and the hardware design are required since the finite-field division takes much time to compute. In this paper, we propose a radix-4 systolic divider on $GF(2^m)$ with comparative area and performance. The algorithm of the proposed divide, is mathematically developed and new counter structure is proposed to map on low-cost systolic cells, so that the proposed systolic architecture is suitable for YLSI design. Compared to the bit-parallel, bit-serial and digit-serial dividers, the proposed divider has relatively effective high performance and low cost. We design and synthesis $GF(2^{193})$ finite-field divider using Dongbuanam $0.18{\mu}m$ standard cell library and the maximum clock frequency is 400MHz.

Spectral Analysis of Nonliner Dynamic Response for Dynamic Instability of Shallow Elliptic Paraboloidal Shells (얕은 타원포물곡면쉘의 동적 불안정 현상의 규명을 위한 비선형 동적 응답의 스펙트럼 분석)

  • 김승덕
    • Computational Structural Engineering
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    • v.8 no.2
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    • pp.153-161
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    • 1995
  • The dynamic instability for snapping phenomena has been studied by many researchers. There is few paper which deal with the dynamic buckling under the load with periodic characteristics, and the behavior under periodic excitation is expected the different behavior against step excitation. In this study, the dynamic direct snapping of shallow elliptic paraboloidal shells is investigated under not only step excitation but also sinusoidal and seismic excitations, applied in the up-and-down direction. The dynamic nonlinear responses are obtained by the numerical integration of the geometrically nonlinear equations of motion, and examined by the Fourier spectral analysis in order to get the frequency-dependent characteristics of the dynamic instability for various load levels. The results show that the dynamic instability phenomenon carried out from stable to unstable region reveals considerably different mechanism depending on the characteristics of excitations.

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Subspace-based Power Analysis on the Random Scalar Countermeasure (랜덤 스칼라 대응기법에 대한 부분 공간 기반 전력 분석)

  • Kim, Hee-Seok;Han, Dong-Guk;Hong, Seok-Hie;Yi, Ok-Yeon
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.47 no.1
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    • pp.139-149
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    • 2010
  • Random scalar countermeasures, which carry out the scalar multiplication by the ephemeral secret key, against the differential power analysis of ECIES and ECDH have been known to be secure against various power analyses. However, if an attacker can find this ephemeral key from the one power signal, these countermeasures can be analyzed. In this paper, we propose a new power attack method which can do this analysis. Proposed attack method can be accomplished while an attacker compares the elliptic curve doubling operations and we use the principle component analysis in order to ease this comparison. When we have actually carried out the proposed power analysis, we can perfectly eliminate the error of existing function for the comparison and find a private key from this elimination of the error.

Gait Pattern Generation for Lower Extremity Exoskeleton Robot and Verification of Energy Efficiency (하지 착용형 외골격 로봇의 효율적 보행패턴 생성 및 에너지 효율성 검증)

  • Kim, Wan-Soo;Lee, Seung-Hoon;Ryu, Jae-Kwan;Baek, Joo-Hyun;Kim, Dong-Whan;Han, Jung-Soo;Han, Chang-Soo
    • Journal of the Korean Society for Precision Engineering
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    • v.29 no.3
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    • pp.346-353
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    • 2012
  • The purpose of this study is to verify the energy efficiency of the integrated system combining human and a lower extremity exoskeleton robot when it is applied to the proposed gait pattern. Energy efficient gait pattern of the lower limb was proposed through leg function distribution during stance phase and the dynamic-manipulability ellipsoid (DME). To verify the feasibility and effect of the redefined gait trajectory, simulations and experiments were conducted under the conditions of walking on level ground and ascending and descending from a staircase. Experiments to calculate the metabolic cost of the human body with or without the assistance of the exoskeleton were conducted. The energy consumption of the lower extremity exoskeleton was assessed, with the aim of improving the efficiency of the integrated system.

Blood Flow Rate Estimation using Proximal Isovelocity Surface Area Technique Based on Region-Based Contour Scheme and Surface Subdivision Flow Model (영역기반 윤곽선 기법과 표면 분할 유동모델에 기반한 근위 등속 표면적 기법을 이용한 혈류량 추정)

  • Jin, Kyung-Chan;Cho, Jin-Ho
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.38 no.1
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    • pp.45-52
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    • 2001
  • The proximal isovelocity surface area (PISA) method is an effective way of measuring the regurgitant blood flow rate in the mitral valve. This method defines the modelling required to describe the geometry of the isotach of the PISA. In the normal PISA flow model, the flow rate is calculated assuming that the surface of the isotach is either hemispherical or non-hemispherical numerically. However, this paper evaluated the estimate flow rate using a direct surface subdivision flow model based on the height field after isotach extraction using a region-based scheme. To validate the proposed method, the various PISA flow models were compared using pusatile color Doppler images with flow rates ranging from $30\;cm^3/sec\;to\;60\;cm^3/sec$ flow rate. Whereas the hemispherical flow model had a mean value of $29\;cm^3/sec$ and underestimated the measured flow rate by 35%, the proposed model and non-hemispherical model produced a c;ame mean value of $45\;cm^3/sec$, moreover, both flow models produced a similar pulsatile flow rate.

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Fast Bit-Serial Finite Field Multipliers (고속 비트-직렬 유한체 곱셈기)

  • Chang, Nam-Su;Kim, Tae-Hyun;Lee, Ok-Suk;Kim, Chang-Han
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.2
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    • pp.49-54
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    • 2008
  • In cryptosystems based on finite fields, a modular multiplication operation is the most crucial part of finite field arithmetic. Also, in multipliers with resource constrained environments, bit-serial output structures are used in general. This paper proposes two efficient bit-serial output multipliers with the polynomial basis representation for irreducible trinomials. The proposed multipliers have lower time complexity compared to previous bit-serial output multipliers. One of two proposed multipliers requires the time delay of $(m+1){\cdot}MUL+(m+1){\cdot}ADD$ which is more efficient than so-called Interleaved Multiplier with the time delay of $m{\cdot}MUL+2m{\cdot}ADD$. Therefore, in elliptic curve cryptosystems and pairing based cryptosystems with small characteristics, the proposed multipliers can result in faster overall computation. For example, if the characteristic of the finite fields used in cryprosystems is small then the proposed multipliers are approximately two times faster than previous ones.