• Proceedings of the Optical Society of Korea Conference
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• 2008.02a
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• pp.411-412
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• 2008

• The Journal of the Korea institute of electronic communication sciences
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• v.14 no.5
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• pp.907-916
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• 2019

In this paper, we propose a new five-qubit multiple bit flip code that can completely protect the target qubit from all multiple bit flip errors using only CNOT gates. The proposed multiple bit flip codes can be easily extended to multiple phase flip codes by embedding Hadamard gate pairs in the root error section as in conventional single bit flip code. The multiple bit flip code and multiple phase flip code in this paper share the state vector error information by four auxiliary qubits. These four-qubit state vectors reflect the characteristic that all the multiple flip errors with Pauli X and Z corrections commonly include a specific root error. Using this feature, this paper shows that low-cost implementation is possible despite the QECC design for multiple-flip error correction by batch processing the detection and correction of Pauli X and Z root errors with only three CNOT gates. The five-qubit multiple bit flip code and multiple phase flip code proposed in this paper have 100% error correction rate and 50% error discrimination rate. All QECCs presented in this paper were verified using QCAD simulator.

• Information and Communications Magazine
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• v.32 no.8
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• pp.76-82
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• 2015

본 고에서는 그래프 상태(graph state)를 이용하여 양 자 오류 정정 부호를 설계하는 기법에 대해서 알아본다. 그래프 상태는 꼭짓점과 각 꼭짓점을 연결하는 변으로 구성된다. 그래프 상태에서 각 꼭지점은 실제 코드워드의 각 큐비트에 해당하며 꼭지 점을 연결하는 변은 양자 오류 정정 부호의 부호화 방식을 결정한다. 본 고에서는 그래프 상태의 특성을 알아보고 그래프 상태 기반 양자 오류 정정 부호 설계 기법을 이용하여 단일 오류를 검출할 수 있는 6-큐비트 양자 오류 정정 부호 설계 방법에 대해 알아본다.

• Electronics and Telecommunications Trends
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• v.35 no.2
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• pp.79-88
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• 2020

Quantum computing is regarded as one of the revolutionary computing technologies, and has attracted considerable attention in various fields, such as finance, chemistry, and medicine. One of the promising candidates to realize fault tolerant quantum computing is quantum dot qubits, due to their expectation of high scalability. In this study, we briefly introduce the international tendencies for quantum dot quantum computing. First, the current status of quantum dot gate operations is summarized. In most systems, over 99% of single qubit gate operation is realized, and controlled-not and controlled-phase gates as 2-qubit entangling gates are demonstrated in quantum dots. Second, several approaches to expand the number of qubits are introduced, such as 1D and 2D arrays and long-range interaction. Finally, the current quantum dot systems are evaluated for conducting quantum computing in terms of their number of qubits and gate accuracies. Quantum dot quantum computing is expected to implement scalable quantum computing. In the noisy intermediate-scale quantum era, quantum computing will expand its applications, enabling upcoming questions such as a fault-tolerant quantum computing architecture and error correction scheme to be addressed.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.12B
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• pp.2003-2015
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• 2000

본 논문에서는 ATM 망을 구성하고 있는 노드(node) 간의 셀(cell) 전송시에 출력 링크(output link)로 전송된 셀이 수신 노드에서 수행하는 UPC/NPC에 의해 손실되지 않는 트래픽 정형화기(shaper)를 제안한다. 제안한 정형화기는 비실시간 가변비트율(nrt-VBR) 트래픽을 대상으로 한 것으로 각 ATM 연결(connection)에 대해 독립된 큐(queue)를 할당하였으며, 출력 링크로 전송할 셀을 저장하고 있는 큐를 선정하기 위해 모든 큐에 대해 Generic Cell Rate Algorithm(GCRA)를 수행하여 큐의 상태를 결정하고, 그 결과 전송 가능 상태에 있는 모든 큐들을 대상으로 본 논문에서 제안한 시간의존 확률적 스케줄링(time-dependent probability scheduling) 알고리즘을 적용하여 특정 큐를 선택하여 셀을 전송한다. 제안한 정형화기의 성능평가를 위해 WRR(Weighted Round Robin) 스케줄링 알고리즘을 사용한 정형화기 및 WFQ(Weighted Fair Queueing) 스케줄링 알고리즘을 적용한 정형화기에 대한 모의실험을 하였으며, 그 결과 제안한 정형화기는 비실시간 가변비트율(nrt-VBR) 트래픽의 정형화(shaping)에 우수한 성능을 나타냄을 확인하였다.

• Superconductivity and Cryogenics
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• v.24 no.1
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• pp.4-9
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• 2022

• The Journal of the Korea institute of electronic communication sciences
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• v.17 no.1
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• pp.31-40
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• 2022

This paper proposes an augmented QSBC(Quantum Short-Block Code) that preserves the function of the existing QSBC and adds a single bit-flip error correction function due to Pauli X and Y errors. The augmented QSBC provides the diagnosis and automatic correction of a single Pauli X error by inserting additional auxiliary qubits and Toffoli gates as many as the number of information words into the existing QSBC. In this paper, the general expansion method of the augmented QSBC using seed vector and the realization method of the Toffoli gate of the single bit-flip error automatic correction function reflecting the scalability are also presented. The augmented QSBC proposed in this paper has a trade-off with a coding rate of at least 1/3 and at most 1/2 due to the insertion of auxiliary qubits.

• Proceedings of the Korea Information Processing Society Conference
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• 2021.05a
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• pp.188-191
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• 2021

최근 IBM, Intel 과 같은 글로벌 ICT 기업들과 여러 스타트업들이 양자 컴퓨터 개발에 성공하였으며 그에 따라 양자 시뮬레이터와 컴파일러에 대한 관심이 높아졌다. 여러 개의 시뮬레이터가 존재하는 만큼 시뮬레이터마다 제공하는 기능과 성능 역시 제각각 다르다. 본 논문에서는 비교적 접근이 쉬운 파이썬과 Q# 기반의 대표적인 양자 시뮬레이터 3 가지(Qiskit, Project Q, Quantum Development Kit)에서 제공하는 기능들을 소개하고 시뮬레이션 실행시간을 비교한다. 10 뎁스의 20 큐비트 회로에서는 QDK 시뮬레이터가 0.227 초로 실행 시간이 가장 짧았고, 10 큐비트의 10 뎁스 회로의 경우 Project Q 가, 1000 뎁스의 경우 Qiskit 이 가장 짧은 실행시간으로 측정됐다.

• Journal of KIISE
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• v.43 no.7
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• pp.736-743
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• 2016

Several studies have reported the impact of core affinity on the network I/O performance of multi-core systems. As the network bandwidth increases significantly, it becomes more important to determine the effective core affinity. Although a framework for dynamic core affinity that considers both network and disk I/O has been suggested, the multiple queues provided by high-speed I/O devices are not properly supported. In this paper, we extend the existing framework of dynamic core affinity to efficiently support the multiple queues of high-speed I/O devices, such as 40 Gigabit Ethernet and NVM Express. Our experimental results show that the extended framework can improve the HDFS file upload throughput by up to 32%, and can provide improved scalability in terms of the number of cores. In addition, we analyze the impact of the assignment policy of multiple I/O queues across a number of cores.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.31 no.3
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• pp.323-330
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• 2021

Recently, the advantages of high-speed arithmetic in quantum computers have been known, and interest in quantum circuits utilizing qubits has increased. The Grover algorithm is a quantum algorithm that can reduce n-bit security level symmetric key cryptography and hash functions to n/2-bit security level. Since the Grover algorithm work on quantum computers, the symmetric cryptographic technique and hash function to be applied must be implemented in a quantum circuit. This is the motivation for these studies, and recently, research on implementing symmetric cryptographic technique and hash functions in quantum circuits has been actively conducted. However, at present, in a situation where the number of qubits is limited, we are interested in implementing with the minimum number of qubits and aim for efficient implementation. In this paper, the domestic hash function LSH is efficiently implemented using qubits recycling and pre-computation. Also, major operations such as Mix and Final were efficiently implemented as quantum circuits using ProjectQ, a quantum programming tool provided by IBM, and the quantum resources required for this were evaluated.