• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.4A
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• pp.352-360
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• 2008

Recently Task Group (TG) 4 of the Institute of Electrical and Electronics Engineers (IEEE) 802.15a has been recommended a system with ranging capability in existence of multiple Simultaneous operating piconets (SOPs) as well as low-cost, low-power. According to the ranging service, coherent and non-coherent based ranging schemes using ternary code have been adopted as a standard. However it is hard to estimate an accurate time of arrival (TOA) in case of using direct sequence based TOA estimation method because pulse repetition interval (PRI) offered by TG is more limited than the maximum excess delay (MED) of channel. To mitigate inter pulse interference (IPI) problem, this paper proposes a non-coherent TOA estimation scheme using non-periodic transmission (NPT) pattern. The proposed receiver is based on a non-coherent energy detection considering with motivation of low rate wireless personal area network (LR-WPAN). TOA information is estimated via proper comparison with a prescribed threshold after the sliding correlation and search back window (SBW) process for reducing TOA error. To verify the performance of proposed ranging scheme, two distinct channel models approved by IEEE 802.15.4a TG are considered. According to the simulation results, we could conclude that the proposed scheme have performed better performance than the conventional method on the existence of multiple SOPs.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39C no.4
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• pp.362-369
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• 2014

A railway SCADA system is a control systems that provide the trains with the electricity. A railway SCADA system sends commands to the RTUs(remote terminal unit) and then it gathers status information of the field devices in the RTUs or controls field devices connected with the RTUs. The RTU can controls input output modules directly, gathers the status information of the field devices connected with it, and send the information to the control center. In this way, a railway SCADA system monitors and controls the electricity power for running trains. The cyber attackers may use some vulnerabilities in the railway SCADA system software to attack critical infrastructures. The vulnerabilities might be created in the railway software development process. Therefore it need to detect and remove the vulnerabilities in the control system. In this paper we propose a new control protocol fuzzing method to detect the vulnerabilities in the DNP3 protocol based application running on VxWorks in RTU(Remote Terminal Unit) that is a component of the centralized traffic control system for railway. Debug-channel based fuzzing method is required to obtain process status information from the VxWorks.

• Spatial Information Research
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• v.15 no.2
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• pp.111-121
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• 2007

The GPS positioning offer 3D position using code and carrier phase measurements, but the user can obtain the precise accuracy positioning using carrier phase in Real Time Kinematic(RTK). The main problem, which RTK have to overcome, is the necessary to have a reference station(RS) when using RTK should be generally no more than 10km on average, which is significantly different from DGPS, where distances to RS can exceed several hundred kilometers. The accuracy of today's RTK is limited by the distance dependent errors from orbit, ionosphere and troposphere as well as station dependent influences like multipath and antenna phase center variations. For these reasons, the author proposes Network based GPS Carrier Phase Differential Positioning using Multiple RS which is detached from user receiver about 30km. An important part of the proposed system is algorithm and software development, named DAUNet. The main process is corrections computation, corrections interpolation and searching for the integer ambiguity. Corrections computation of satellite by satellite and epoch by epoch at each reference station are calculated by a Functional model and Stochastic model based on a linear combination algorithm and corrections interpolation at user receiver are used by area correction parameters. As results, the users can obtain the cm-level positioning.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.40 no.5
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• pp.429-435
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• 2016

Cold stretching(CS) pressure vessels from ASS304 (austenitic stainless steel 304) are used for the transportation and storage of liquefied natural gas(LNG). CS pressure vessels are manufactured by pressurizing the finished vessels to a specific pressure to produce the required stress ${\sigma}_k$. After CS, there is some degree of plastic deformation. Therefore, CS vessels have a higher strength and lighter weight compared to conventional vessels. In this study, we investigate the tensile and fatigue behavior of ASS304 sampled by CS pressure vessels in accordance with the ASME code at cryogenic temperature. From the fatigue test results, we show S-N curves using a statistical method recommended by JSEM-S002. We carried out the fractography of fractured specimens using scanning electron microscopy (SEM).

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.40 no.5
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• pp.378-387
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• 2003

Digital watermarking is the technique that embeds invisible signalsincluding owner identification information, specific code, or pattern into multimedia data such as image, video and audio. Watermarking techniques can be classified into two groups; robust watermarking and fragile(semi-fragile) watermarking. The main purpose of the robust watermarking is the protection of copyright, whereas fragile(semi-fragile) watermarking prevents image or video data from illegal modifications. To achieve this goal watermark should survive from unintentional modifications such as random noise or compression, but it should be fragile for malicious manipulations. In this paper, an invertible semi-fragile watermarkingalgorithm for authentication and detection of manipulated location in MPEG-2 bit-stream is proposed. The proposed algorithm embeds two kinds of watermarks, which are embedded into quantized DCT coefficients. So it can be applied directly to the compressed bit-stream. The first watermark is used for authentication of video data. The second one is used for detection of malicious manipulations. It can distinguish transcodingin bit-stream domain from malicious manipulation and detect the block-wise locations of manipulations in video data. Also, since the proposed algorithm has an invertible property, recovering original video data is possible if the watermarked video is authentic.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.4
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• pp.37-47
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• 2016

The practical constraints on the commercial FPGAs which contain dedicated wide function multiplexers in their slice structure are incorporated with one of the most advanced FPGA mapping algorithms based on the AIG (And-Inverter Graph), one of the best logic representations in academia. As the first step of the mapping process, cuts are enumerated as intermediate structures. And then, the cuts which can be mapped to the multiplexers are recognized. Without any increased complexity, the delay and area of multiplexers as well as LUTs are calculated after checking the requirements for the tree construction such as symmetry and depth limit against dynamically changing mapping of neighboring nodes. Besides, the root positions of multiplexer trees are identified from the RTL code, and annotated to the AIG as AOs (Auxiliary Outputs). A new AIG embedding the multiplexer tree structures which are intentionally synthesized by Shannon expansion at the AOs, is overlapped with the optimized AIG. The lossless synthesis technique which employs FRAIG (Functionally Reduced AIG) is applied to this approach. The proposed approach and techniques are validated by implementing and applying them to two RISC processor examples, which yielded 13~30% area reduction, and up to 32% delay reduction. The research will be extended to take into account the constraints on the dedicated hardware for carry chains.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.2
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• pp.34-45
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• 2007

Digital decimation filter is inevitable in oversampled sigma-delta A/D converters for the sake of reducing the oversampled rate to Nyquist rate. This paper presented a Verilog-HDL design and implementation of an area-efficient digital decimation filter that provides time-to-market advantage for sigma-delta analog-to-digital converters. The digital decimation filter consists of CIC(cascaded integrator-comb) filter and two cascaded half-band FIR filters. A CSD(canonical signed digit) representation of filter coefficients is used to minimize area and reduce in hardware complexity of multiplication arithmetic. Coefficient multiplications are implemented by using shifters and adders. This three-stage decimation filter is fabricated in $0.25-{\mu}m$ CMOS technology and incorporates $1.36mm^2$ of active area, shows 4.4 mW power consumption at clock rate of 2.8224 MHz. Measured results show that this digital decimation filter is suitable for digital audio decimation filters.

• Journal of the Korea Society of Computer and Information
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• v.19 no.12
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• pp.111-121
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• 2014

In this paper, we propose tree-based hybrid query tree architecture utilizing time slot. 4-Bit Pattern Slot Allocation(4-SL) has a 8-ary tree structure and when tag ID responses according to query of the reader, it applies a digital coding method, the Manchester code, in order to extract the location and the number of collided bits. Also, this algorithm can recognize multiple Tags by single query using 4 fixed time slots. The architecture allows the reader to identify 8 tags at the same time by responding 4 time slots utilizing the first bit($[prefix+1]^{th}$, F ${\in}$ {'0' or '1'}) and bit pattern from second ~ third bits($[prefix+2]^{th}{\sim}[prefix+3]^{th}$, $B_2{\in}$ {"00" or "11"}, $B_1{\in}$ {"01" or "10"}) in tag ID. we analyze worst case of the number of query nodes(prefix) in algorithm to extract delay time for recognizing multiple tags. The identification delay time of the proposed algorithm was based on the number of query-responses and query bits, and was calculated by each algorithm.

• The KIPS Transactions:PartD
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• v.13D no.6 s.109
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• pp.823-832
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• 2006

The Purpose of Similarity(Reproduction) Degree Appraisal is to determine the equality or similarity between two programs and it is a system that presents the technical grounds of judgment which is necessary to support the resolution of software intellectual property rights through expert eyes. The most important things in proceeding software appraisal are not to make too much of expert's own subjective judgment and to acquire the accurate-appraisal results. However, up to now standard research and development for its systematic techniques are not properly made out and as different expert as each one could approach in a thousand different ways, even the techniques for software appraisal types have not exactly been presented yet. Moreover, in the analyzing results of all the appraisal cases finished before, through a practical way, we blow that there are some damages on objectivity and accuracy in some parts of the appraisal results owing to the problems of existing appraisal procedures and techniques or lack of expert's professional knowledge. In this paper we present the model for the standardization of software-similarity-appraisal techniques and objective-evaluation methods for decreasing a tolerance that could make different results according to each expert in the same-evaluation points. Especially, it analyzes and evaluates the techniques from various points of view concerning the standard appraisal process, setting a range of appraisal, setting appraisal domains and items in detail, based on unit processes, setting the weight of each object to be appraised, and the degree of logical and physical similarity, based on effective solutions to practical problems of existing appraisal techniques and their objective and quantitative standardization. Consequently, we believe that the model for the standardization of software-similarity-appraisal techniques will minimizes the possibility of mistakes due to an expert's subjective judgment as well as it will offer a tool for improving objectivity and reliability of the appraisal results.

• Journal of KIISE
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• v.42 no.4
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• pp.496-503
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• 2015

Most programming languages are designed based on English. It becomes another barrier in learning programming languages in non-English speaking country. If a programming language is presented using a native language, the education cost of programming will be much cheaper and the programming itself can be much more fun. However, designing the programming languages based on native languages has not been much focused or published up to now. It is partly because the evolution of popular programming languages is so fast, and partly because the efficiency of programs is much stressed than the source code. But, the designing of programming languages based on native language is not a small issue, especially if we reflect on the education of programming. In fact, there have been significant efforts reported in the Korean programming languages so far, but it has not practically been used in the education. This paper introduces yet another Korean programming language, namely Sprout, which is concise and can be easily learned by beginners. To demonstrate the conciseness of Sprout, we have performed two experiments on Sprout. Firstly, we compared the sizes of the programs in Sprout with those in former Korean programming languages. Secondly, we compared the size of Sprout, the language itself, with those of popular programming languages such as C and Python. According to the experiments, Sprout programs are more concise to 10% on average than those in former Korean languages. Furthermore, Sprout itself is more compact to 24% on average than other popular programming languages.