• Journal of the Institute of Electronics Engineers of Korea TC
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• v.48 no.11
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• pp.1-8
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• 2011

In this paper, we study receiver design issue to apply the OFDM based WLAN specification, such as 802.11p, to the communications in high speed mobile environment, e.g., for the ICT based railroad control on a train having its speed up to 300 km/hr. To successfully apply the existing WLAN specifications without modifying its transmission format, the performance at the receiver will solely depends on the channel estimation performance if we ignore the affect of frequency offset With a speed of multiple hundred km/hr, the channel estimation using only the preamble will not provide enough precision since the channel changes so fast. Therefore, in this paper, taking the high mobility into account, we focus on the design of decision directed channel estimation and equalization techniques and perform simulations to evaluate and compare their performances and to finally confirm the applicability of the existing WLAN specification to the systems with very high mobility.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.1C
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• pp.82-91
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• 2005

This paper introduces an efficient affine projection algorithm(APA) using iterative hyperplane projection. Among various fast converging adaptation algorithms, APA has been preferred to be employed for various applications due to its inherent effectiveness against the rank deficient problem. However, the amount of complexity of the conventional APA could not be negligible because of the accomplishment of sample matrix inversion(SMI). Moreover, the 'shifting invariance property' usually exploited in single channel case does not hold for the application of space-time decision-directed equalizer(STDE) deployed in single-input-multi-output(SIMO) systems. Thus, it is impossible to utilize the fast adaptation schemes such as fast transversal filter(FlF) having low-complexity. To accomplish such tasks, this paper introduces the low-complexity APA by employing hyperplane projection algorithm, which shows the excellent tracking capability as well as the fast convergence. In order to confirm th validity of the proposed method, its performance is evaluated under wireless SIMO channel in respect to bit error rate(BER) behavior and computational complexity.

• The Journal of the Acoustical Society of Korea
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• v.32 no.6
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• pp.494-501
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• 2013

The convolution code(CC) of code rate 1/2 as a forward error correction (FEC) in Quadrature Phase Shift Keying (QPSK) is applied to decrease bit error rate (BER) by background noise and multipath in shallow water acoustic channel. Ratio of transmitting signal bandwidth to channel coherence bandwidth is defined as frequency selectivity index. BER and bit energy-to-noise ratio gain of transmitted signal according to frequency selectivity index are evaluated. In the results of indoor water tank experiment, BER is well matched theoretical results at frequency selectivity index less than about 1.0. And bit energy-to-noise ratio gain is also matched theoretical value of 5 dB. BER is effectively decreased at frequency selective multipath channel with frequency selectivity index higher than 1.0. But bit energy-to-noise ratio greater than a certain size in terms of CC weaving is effective in reducing bit errors. In the results, the defined frequency selectivity index in this study could be applied to evaluate a performance of CC in multipath channel. Also it could effectively reduced BER in a low speed underwater acoustic communication system without an equalizer.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.9
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• pp.11-20
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• 1998

High-speed complex-number arithmetic units are essential to baseband signal processing of modern digital communication systems such as channel equalization, timing recovery, modulation and demodulation. In this paper, a new complex-number multiplication algorithm is proposed, which is based on redundant binary (RB) arithmetic combined with radix-4 Booth recoding scheme. The proposed algorithm reduces the number of partial product by one-half as compared with the conventional direct method using real-number multipliers and adders. It also leads to a highly parallel architecture and simplified circuit, resulting in high-speed operation and low power dissipation. To demonstrate the proposed algorithm, a prototype complex-number multiplier-accumulator (CMAC) core with 10-bit operands has been designed using 0.8-$\mu\textrm{m}$ N-Well CMOS technology. The designed CMAC core contains about 18,000 transistors on the area of about 1.60 ${\times}$ 1.93 $\textrm{mm}^2$. The functional and speed test results show that it can operate with 120-MHz clock at V$\sub$DD/=3.3-V, and its power consumption is given to about 63-mW.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.40 no.11
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• pp.51-62
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• 2003

This paper presents a novel survivor memeory management and decoding techniques with sequential backward state transition control in the trace back Viterbi decoder. The Viterbi algorithm is an maximum likelihood decoding scheme to estimate the likelihood of encoder state for channel error detection and correction. This scheme is applied to a broad range of digital communication such as intersymbol interference removing and channel equalization. In order to achieve the area-efficiency VLSI chip design with high throughput in the Viterbi decoder in which recursive operation is implied, more research is required to obtain a simple systematic parallel ACS architecture and surviver memory management. As a method of solution to the problem, this paper addresses a progressive decoding algorithm with sequential backward state transition control in the trace back Viterbi decoder. Compared to the conventional trace back decoding techniques, the required total memory can be greatly reduced in the proposed method. Furthermore, the proposed method can be implemented with a simple pipelined structure with systolic array type architecture. The implementation of the peripheral logic circuit for the control of memory access is not required, and memory access bandwidth can be reduced Therefore, the proposed method has characteristics of high area-efficiency and low power consumption with high throughput. Finally, the examples of decoding results for the received data with channel noise and application result are provided to evaluate the efficiency of the proposed method.

• Journal of the Institute of Convergence Signal Processing
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• v.5 no.4
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• pp.333-337
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• 2004

This paper describe a design of 5GHz OFDM baseband chip for IEEE 802.11a wireless LAN. The proposed device is consists of transmitter and receiver within a single FPGA chip. We applied single tap equalizer that use Normalized LMS algorithm to remove ISI that happen at high speed data transmission. And also, we used carrier wave frequency offset algorithm that use training symbol to remove ICI. The simulation results show the correct transmission without errors the between transmitter and receiver And we can remarkably reduce the number of register through the synthesized circuits by using DSP block and EMB(Embedded Memory Block). The target device for implementation of the synthesized circuits is Altera Stratix EPIS25FC672 FPGA and design platform is VHDL.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.405-408
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• 2013

The performance of underwater acoustic(UWA) communication system is sensitive to the Inter-Symbol Interference(ISI) due to delay spread develop of multipath signal propagation. And due to limited frequency using acoustic wave, UWA is a low transmission rate. Thus, it is necessary technique of Space-time code, equalizer and channel code to improve transmission speed and eliminate ISI. In this paper, UWA communication system were analyzed by simulation using these techniques. In the result of simulation, the proposed Space-time code, Turbo code, and Zero forcing techniques is shown that improved performance than conventional UWA communication.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.9C
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• pp.906-914
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• 2009

SC-FDMA is employed in the 3GPP-LTE standard as the uplink transmission scheme. SC-FDMA has advantages that the signal has a low PAPR property and a simple equalizer such as FD-LE can be implemented. But FD-LE has inferior performance to Hybrid-DFE composed of frequency-domain feedforward filter and time-domain feedback filter. Recently, several IB-DFE algorithms have been proposed to overcome the disadvantages of implementation and processing complexity of Hybrid-DFE and to obtain superior performance to FD-LE. In this paper, we apply several IB-DFE algorithms to 3GPP-LTE uplink system and compare their performance by calculating BER. We investigate the effects of channel estimation errors and Doppler shift on performance. Finally, by analyzing computational complexity of IB-DFEs, we present some criteria to choose appropriate algorithm and to decide the number of iterative processes.

• Journal of The Institute of Information and Telecommunication Facilities Engineering
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• v.1 no.2
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• pp.4-18
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• 2002

In this paper, we propose the new design method for the OFDM based modem that is considerd a standard of wireless communication in indoor environments. We designed a improved FFT/IFFT in order to satisfy a data rate $6{\sim}54$Mbps required homenetworking of high speed and a improved channel equalization circuit using pilot signals for modile environments. And we designed a carrier offset estimator that uses the $tan^{-1}$ circuit to organize a memory structure. All steps are verifed performance through a FPGA and are implemented ASIC to use a standard library cell.

• Journal of Advanced Navigation Technology
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• v.6 no.1
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• pp.37-43
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• 2002

This paper describes the performance evaluation and analysis of Wireless Local Area Network (W-LAN) in the 5 GHz ISM-band in compliance with IEEE 802.11a. At present, most W-LAN products are based on 2.4 GHz band, but low speed (11Mbps) has the limitation to serve systems demanding high-speed data transmission. To solve this problem, it is necessary to design next generation W-LAN system with 54Mbps in the 5GHz. It is sure that implementation of next generation W-LAN will bring competitive advantages. In particular, it will support telecommunications for high-speed mobile environments as well as for fixed places such as a school zone, a lecture room, a hospital and other premises. A few simulation methods are applied to more accurate and reliable performance analysis of next generation W-LAN. To verify if continuous data service is supported for a high-speed mobile notebook, multi-path fading channels between wireless Access Point (AP) and wireless Network Interface Card (NIC) are modeled. In addition, low interference is analyzed via convolutional codes and Orthogonal Frequency-Division Multiplexing (OFDM). Also, to obtain reliable Bit Error Rate (BER), a single tap Least Mean Square (LMS) equalizer is applied. Given the above simulation, next generation W-LAN is an ideal solution for continuous data transmission in high-speed mobile environments.