• Proceedings of the KIEE Conference
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• 2005.07b
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• pp.1255-1257
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• 2005

본 논문에서는 튜브시트 내, 외부의 여러 다른 위치에서 확관이 이루어졌을 때 절대 및 차동 와전류신호를 유한요소 모델링으로 예측하고, 신호에서 자성 튜브시트로 인한 신호변화와 확관으로 인한 신호변화를 관찰하였으며, 이들에 미치는 주파수의 영향을 조사하였다. 그 결과, 절대 및 차동신호 모두 튜브시트의 위치 파악에는 저주파가 유리하고, 주파수가 높을수록 확관된 내경의 측정 및 확관 천이부의 파악이 용이하였으며, 절대신호가 차동신호에 비해 신호변화가 더 크고 지속적이어서, 확관 품질을 조사하기에 더 적합한 신호형태를 가지고 있음을 알 수 있었다.

• Proceedings of the KAIS Fall Conference
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• 2012.05b
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• pp.800-803
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• 2012

본 논문에서는 SATA(Serial Advanced Technology Attachment) 커넥터의 차동 임피던스를 정합하여 신호 전달 특성을 개선한다. 3차원 FEM(Finite Elements Method) 전자기장 시뮬레이터를 이용하여 SATA 커넥터의 차동 모드 S-파라미터를 추출하고, 신호 전달 특성을 분석한다. SATA 커넥터의 반사 손실 ($S_{dd11}$)은 5 GHz 까지 20 dB 이하의 값을 나타내고, 삽입 손실($S_{dd21}$)은 0.1 dB 이하의 값을 나타낸다. 또한 인덕턴스, 커패시턴스, 상호 인덕턴스, 상호 커패시턴스를 추출하여 차동 임피던스를 계산한다. SATA 커넥터의 차동 임피던스는 107.3 ${\Omega}$으로 부정합이다. 차동 임피던스를 정합하기위해서 커넥터 신호 핀을 dx 방향으로 설계 변경한다. $d_x$ 방향으로 0.04 mm 증가 시켰을 때 차동 임피던스가 99.5 ${\Omega}$으로 최적으로 정합되었다. 또한 반사 손실은 1.5 GHz 에서 11 dB 개선되고, 삽입 손실은 최대 약 0.05 dB 개선되었다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.8 s.338
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• pp.1-6
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• 2005

A dual-level low voltage differential signalling (DLVDS) circuit is proposed aiming at reducing transmission lines for LCD driver IC. In the proposed circuit, we apply a couple of primitive data to DLVDS circuit as inputs. The transmitter converts two inputs to two kinds of fully differential level signals. In this circuit, two transmission lines are sufficient to transfer two primitive inputs while keeping the LVDS feature. The receiver recovers The original input data through a level decoding circuit. We fabricated the proposed circuit using $0.25\mu m$ CMOS technology. The resultant circuit shows 1-Gbps/2-line data rate and 35-mW power consumption at 2.5V supply voltage, respectively.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.2
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• pp.61-66
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• 2011

A new via structure on printed circuit board has been proposed for differential signaling in applications of high-speed interconnection. In new structure, the via is physically separated and then divided into two electrically-isolated sections using mechanical drill routing process. These cutted vias are connected respectively to the traces of the differential pair. New via structure makes possible to rout the differential pair using only one via, while conventional via structure needs two vias for interconnection. Because the spacing even in via region keeps almost constant, new via structure can alleviate an impedance discontinuity and then enhance its signal transmission characteristics such as reflection loss and insertion loss. It is expected that new via structure is effective in differential signaling for high-speed interconnection.

• Journal of the Korean Society for Nondestructive Testing
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• v.24 no.3
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• pp.253-258
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• 2004

To get accurate information about the defect from the test signal, NDT engineers should have a good knowledge on forward problems. Such knowledge is usually obtained by a lot of testing experiences. Another why of obtaining such knowledge is to build a database containing lots of defect information and their corresponding signals. However, the archiving of raw test data would require a lot of storage space. In this paper, an economic way of storing signals is studied by using Fourier descriptors. Instead of saving raw signal data, Fourier descriptors are saved and the storage spare is reduced. Of course, the defect signal can be reconstructed from the stored descriptors. By using differential ECT signals produced by numerical modeling and experiment, the savings of 85% from the original signal and $57{\sim}65%$ from the filtered signal in the storage space were confirmed. The similarity of the reconstructed signal and the original signal was also demonstrated. This Fourier descriptor approach could contribute significantly in building differential signal databases.

• Journal of the Korean Society for Nondestructive Testing
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• v.24 no.4
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• pp.315-324
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• 2004

In eddy current testing(ECT), differential probes have been frequently used since they .an reduce the number of parameters that influence ECT signals. However, differential signal is actually the difference of the two coils' impedance so that signal prediction and interpretation are not easy, On the other hand, absolute coil signal is rather straightforward to predict and analyze. Therefore, combined use of the two types of signals would increase the test reliability. In this paper, absolute coil signals from Inconel plate and tubes are predicted by the finite element analysis and efforts of lift-off, fill-factor, conductivity, operating frequency, test specimen thickness, inner diameter defects, and outer diameter defects are investigated. As a result, various impedance plane diagrams are drawn and analyzed. Significant practical knowldege about absolute signals is accumulated and similar characteristics of the two types of signal could be understood. Finally, slope angle versus defect depth calibration corves are prepared for three different frequencies.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.2
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• pp.47-53
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• 2013

In this work, signal transmission properties of SATA connector have been improved using its differential impedance calculation and its design revision to closer impedance matching. Using 3 dimensional electromagnetic field simulator, the differential mode S-parameter was calculated to investigate its signal fidelity. The differential impedance is calculated from the equation of the odd mode impedance with inductance, capacitance, mutual inductance, and mutual capacitance. The differential impedance of SATA connector was calculated to be $107.3{\Omega}$ and did not meet the design specification with $100{\Omega}{\pm}5%$. In order to achieve its impedance range and improve its signal transmission properties, SATA connector's design has been revised with two different directions and analyzed through the calculation of differential impedance, differential reflection loss, and differential insertion loss.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.20 no.6
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• pp.81-86
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• 2006

Routing signal lines in PCB, line shapes would be straight or bent. time-domain and frequency-domain evaluation of the signal property and interference are archived by precise Modeling of differential signal line. Some of CAD tools can extract equivalent circuit model parameters. but it takes a long time and heavy loads. This paper introduces a basic RLC equivalent circuit model parameter extraction technique for bent differential structures using genetic algorithm by this technique, we can model equivalent circuit of bent differential structures more faster.

• The Journal of the Korea Contents Association
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• v.6 no.3
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• pp.38-45
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• 2006

A dual-level low voltage differential signalling (DLVDS) circuit is proposed aiming at reducing transmission lines for a LCD driver IC. We apply two data to the proposed DLVDS circuit as inputs. Then, the transmitter converts two inputs to two kinds of fully differential signals. In this circuit, two transmission lines are sufficient to transfer two inputs while keeping the LVDS feature. However, the circuit has a common mode bias fluctuation due to difference of the input bias and the reference bias. We compensate the common mode bias fluctuation using a feedback circuit of the current source bias. The receiver recovers the original input data through a level decoding circuit. We fabricated the proposed circuit using $0.25{\mu}m$ CMOS technology. The simulation results of proposed circuit shows 1-Gbps/2-line data rate and 35mW power consumption at 2.5V supply voltage, respectively.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.10
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• pp.70-78
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• 2009

This paper addresses the analysis and the design optimization of differential interconnects for high-speed Low-Voltage Differential Signaling (LVDS) applications. Thanks to the differential transmission and the low voltage swing, LVDS offers high data rates and improved noise immunity with significantly reduced power consumption in data communications, high-resolution display, and flat panel display. We present an improved model and new equations to reduce impedance mismatch and signal degradation in cascaded interconnects using optimization of interconnect design parameters such as trace width, trace height and trace space in differential printed circuit board (FPCB) transmission lines. We have carried out frequency-domain full-wave electromagnetic simulations, and time-domain transient simulations to evaluate the high-frequency characteristics of the differential FPCB interconnects. We believe that the proposed approach is very helpful to optimize high-speed differential FPCB interconnects for LVDS applications.