• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.2
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• pp.80-85
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• 2010

In this paper, the efficiency of power amplifier has been maximized by the application of EER structure, and the linearity has been improved by using metamaterial structure. This paper has proposed a design of power amplifier in class-F to get the PAE, and to control dynamic power using envelope detector. CRLH structure gets high-linearity by removing harmonics arisen from the mismatching of matching circuit. The PAE and the 3rd order IMD have been improved 5.93 %, 12.83 dB compared with those of conventional Class-F amplifier, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.2 s.93
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• pp.149-153
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• 2005

A new method of power amplifier's linearity improvement using a Compact Microstrip Resonant Cell(CMRC) is proposed. It is found out that a CMRC at the input side gives better performance than that at the output. Tuning lines are used in the input and the output matching network to get the optimum performance. As a result, the 14.77 dB improvement fur the third-order IMD is obtained. And the size of the CMRC is only $17.1\times5.22mm$.

• Journal of Sensor Science and Technology
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• v.6 no.2
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• pp.145-154
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• 1997

Based on a new search strategy using circuit simulation and simulated annealing with local search, a technique for design automation of high-performance operational amplifiers is proposed. For arbitrary circuit topology and performance specifications, through discrete optimization of a cost function with discrete design variables the design of operational amplifiers is performed. A special-purpose circuit simulator and some heuristics are used to reduce the design time. Through the design of a low-power high-speed fully differential CMOS operational amplifier usable in smart sensors and 10-b 25-MS/s pipelined A/D converters, it has been demonstrated that a design tool developed using the proposed technique can be used for designing high-performance operational amplifiers with less design knowledge and less design effort.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.11
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• pp.50-55
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• 2009

In this paper, a distributed amplifier is designed using distributed network synthesis that provides the optimum absorption capability of a capacitance. Transfer functions of filters, which consist of the amplifier, are synthesized by a low-pass Chebyshev approximation. Capacitances that a filter network can absorb are calculated as a function of its minimum insertion loss(MIL) and ripple. Active devices in a distributed amplifier are modeled as equivalent circuits by using their S-parameters, and their equivalent capacitances are absorbed into filter structures by properly adjusting the MIL and ripple of a transfer function. As an application example, a distributed amplifier with the gain of about 12.5dB is designed that operates over the frequency range between 0.1 and 7.5GHz. Experimental results prove that distributed network synthesis, which considers capacitance absorption capability, is useful to the design of distributed amplifiers.

• Journal of Advanced Navigation Technology
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• v.9 no.2
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• pp.164-169
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• 2005

In this paper, the high efficiency Doherty power amplifier using adaptive bias technique has been designed and realized for 2.3GHz Wibro applications. The RF performances of the Doherty power amplifier using adaptive bias technique have been compared with those of a class AB amplifier alone, and conventional Doherty amplifier. The Maximum PAE of designed Doherty power amplifier with adaptive bias technique has been 36.6% at 34.0dBm output power. The proposed Doherty power amplifier showed an improvement 1dB at output power and 7.6% PAE than a class AB amplifier alone.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.10
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• pp.1083-1088
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• 2002

A 5.8 GHz high gain MMIC amplifier was designed and fabricated. A HEMT was used as a active device and the spiral inductors and the metal insulator metal capacitors were used as the passive devices. To stabilize the high gain amplifier a RC feedback circuit was used. The amplifier has 4 stage and 31 dB measured gain. To prevent a oscillation by the coupling effects among the passive devices, the distance between the passive devices are made as far as possible. The via grounds were used to reduce the coupling effect between the input stage and the output stage.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.2
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• pp.53-57
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• 2017

This paper proposes a 401MHz-406MHz low noise amplifier for MedRadio applications. The proposed low noise amplifier adopts a common gate amplifier topology using current reuse gm-boosting technique. The proposed low noise amplifier shows better performance of voltage gain and noise figure than the conventional gm-boosted common gate amplifier in the same power consumption. The proposed current-reuse gm-boosted low noise amplifier achieves a voltage gain of 22 dB, a noise figure of 2.95 dB, and IIP3 of -17 dBm while consuming $170{\mu}W$ from a 0.5 V supply voltage in $0.13{\mu}m$ CMOS process.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.8
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• pp.1407-1413
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• 2000

This paper presents a feedforward linear power amplifier (LPA) using error feedback technique to achieve low intermodulation distortions(IMD) of power amplifiers for base stations. Especially, the proposed linear power amplifier is applied to feedforward technique combined with error feedback technique, which has no loss of amplifier gain unlike typical feedback technique. The proposed LPA is designed by using HP ADS ver. 1.3, fabricated. When two-tone signals at 1850 MHz and 1851.25 MHz with -7 dBm/tone from synthesizers are injected into the main power amplifier with gain of 28 dB and P1dB of 1W, the proposed LPA could reduce more than 35 dB.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.11 s.114
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• pp.1030-1039
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• 2006

A high power and high gain Doherty amplifier is designed by using embedded driver amplifiers in the final stage. The operational characteristics of a two-stage Doherty amplifier are analyzed, as a function of the two-stage peaking amplifier gate biases. The driver stages and final output stages are implemented using two single-ended MRF21045s and a single push-pull packaged MRF5P21180, respectively. This two-stage Doherty amplifier demonstrated 27 dB gain with a PAE of 23 % at 15 W average output power.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.873-876
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• 2005

This paper presents a new current transient test technique for wideband CMOS Op Amps. This technique monitors the transient power supply current and output responses of the CMOS Op Amp to automatically differentiate faulty and fault-free op amps. The wideband op amp is designed using 0.25${\mu}$m CMOS technology. We present detailed simulation results for a wideband op amp. We show that catastrophic faults in op amps can be detected and analyzed by monitoring power supply currents and output responses. This technique is inexpensive and simple.