• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2020.07a
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• pp.593-595
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• 2020

본 논문에서는 5G NR 시스템을 위한 동기 신호를 이용한 cell ID 검출 방법에 대한 성능을 비교하였다. 5G NR(fifth-generation new radio) 시스템의 송신기는 SS/PBCH (synchronization signal/physical broadcast channel) 블록을 송신하며, 수신기는 수신된 SS/PBCH 블록을 이용하여 주파수 및 타이밍 오프셋 (frequency and timing offset)을 추정 할 수 있으며, cell ID (cell identity)는 PSS (primary synchronization signal)와 SSS (secondary synchronization signal)를 통해 검출할 수 있다. 본 논문에서는 cell ID 를 검출할 수 있는 방법으로서 2-stage 디코딩 방법과 결합 최대우도 결정 규칙 (joint maximum-likelihood decision rule: joint ML) 디코딩 방법을 사용하였다. Joint ML 디코딩 방법은 2-stage 디코딩 방법에 비해 더 좋은 검출 성능을 보이지만, 복잡도 측면에서는 2-stage 디코딩 방법이 joint ML 디코딩 방법에 비해 더 낮은 복잡도를 갖는 것을 확인하였다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.5
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• pp.501-509
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• 2011

Software defined radio(SDR) has a goal that places the analog-to-digital converter(ADC) as near the antenna as possible. But current technique actually can't do analog-to-digital converting about RF band signals. So one method is studying that samples RF band signals to IF band. One of the ways Sub-Sampling technique can convert signals from RF band to IF band without oscillator. If Sub-Sampling technique is used, over 2 bands can convert signals from RF band to IF band. But due to the filter performance in RF band, it is possible to generate interference between signals that is converted in low frequency band. The effect degrades performance. In this paper, we propose one method that uses time division multiplexing(TDM) method as a solution to avoid interference between signals. By doing TDM and Sub-Sampling at the same time that method can get signals without large changes of structures.

• Journal of Advanced Navigation Technology
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• v.10 no.3
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• pp.235-249
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• 2006

In this paper, SER(Symbol Error Rate) variation and effects on SER by phase noise at various frequency offset of the local oscillator in digital communication systems are gerneralyzed for QPSK(Quadrature Phase Shift Keying), MQAM(M-ary Quadrature Amplitude Modulation), OFDM(Orthogonal Frequency Division Multiplex)-MQAM, OFDM-QPSK and 8-VSB(Vestigal Side Bands) modulation methods and compared those with the ideal cases, which have no phase noise, through the MATLAB simulation. And the ration between modulation bandwidths and the SER on the various frequency offsets on the above modulation methods have been analyzed for the system requirement of minimum phase noise characteristics. From this study, we have confirmed that the most sensitive modulation method on the phase noise is OFDM-MQAM and that the relatively insensitive method 8-VSB.

• The Journal of Korean Institute of Information Technology
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• v.16 no.11
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• pp.61-68
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• 2018

This paper describes design of a 10.525 GHz self oscillating mixer semiconductor IC chip combining voltage controlled oscillator and frequency mixer using silicon CMOS technology for Doppler radar applications. The p-core type VCO included in the self oscillating mixer minimizes the noise contained in the transmitted signal. This noise minimization increases the sensing distance and acts in a direction favorable to the reaching distance and the sensitivity of the motion detection sensor. Simulation results for phase noise show that a VCO designed as a P-core has a noise characteristic of -106.008 dBc / Hz at 1 MHz offset and -140.735 dBc / Hz at 25 MHz offset compared to a VCO designed with N-core and NP-core showed excellent noise characteristics. If a self-oscillating mixer is implemented using a p-core designed VCO in this study, a motion sensor with excellent range and reach sensitivity will be produced.

• Journal of Satellite, Information and Communications
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• v.9 no.3
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• pp.27-32
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• 2014

A doppler shift is generated by moving a transmitter or receiver operated in communication systems. The doppler frequency shift between a transmitter and a receiver or the frequency offset present in transceivers must be removed to get the wanted system performance. FTS is used for preventing an accident from operating abnormally and for guaranteeing public protection. A launching vehicle's initial velocity is very fast in order to escape the earth and the amount of doppler shift is large. Recently many studies to adopt the next generation FTS are ongoing. To introduce new FTS, the effects of doppler shift on the performance of the new FTS must be studied. In this paper the doppler effect caused by launching vehicle's velocity affecting the performance of FTS receiver is investigated into two cases, one is for EFTS as a digital FTS and the other is for FTS using a tone signal. Noncoherent DPSK and noncoherent CPFSK are considered as the modulation methods of EFTS. In the cases of the doppler frequency shift of 200Hz present in EFTS using noncoherent DPSK and noncoherent CPFSK are simulated. Simulation results show that $E_b/N_o$ of 0.5dB deteriorates in the region of near BER of about $10^{-5}$ in RS coding. And there is no performance variation in $E_b/N_o$ or $E_b/N_o$ is worsened about 0.1dB in the same BER region for the case of using convolutional and BCH coding. Quadrature detector used in FTS using tone signals is not influenced by the doppler frequency shift.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.47 no.2
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• pp.25-34
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• 2010

This paper proposed a high-speed voltage-controlled ring-oscillator(VCRO) using a frequency doubling technique. The design of the proposed oscillator has been based on TSMC 0.18um 1.8V CMOS technology. The frequency doubling technique is achieved by AND-OR operations with 4 signals which have $90^{\circ}$ phase difference one another in one cycle. The proposed technique has been implemented using a 4-stage differential oscillator compose of differential latched inverters and NAND gates for AND and OR operations. The differential ring-oscillator can generate 4 output signals, which are $90^{\circ}$ out-of-phase one another, with low phase noise. The ANP-OR operations needed in the proposed technique are implemented using NAND gates, which is more area-efficient and provides faster switching speed than using NOR gates. Simulation results show that the proposed, VCRO operates in the frequency range of 3.72 GHz to 8 GHz with power consumption of 4.7mW at 4GHz and phase noise of ~-86.79dBc/Hz at 1MHz offset. Therefore, the proposed oscillator demonstrates superior performance compared with previous high-speed voltage-controlled ring-oscillators and can be used to build high-performance frequency synthesizers and phase-locked loops for radio-frequency applications.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.5
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• pp.40-49
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• 2008

A Frequency synthesizer for mobile-DTV applications is implemented using $0.18{\mu}m$ CMOS process with 1.8V supply. PMOS transistors are chosen for VCO core to reduce phase noise. The measurement result of VCO frequency range is 800MHz-1.67GHz using switchable inductors, capacitors and varactors. We use varactor bias technique for the improvement of VCO gain linearity, and the number of varactor biasing are minimized as two. VCO gain deterioration is also improved by using the varactor switching technique. The VCO gain and interval of VCO gain are maintained as low and improved using the VCO frequency calibration block. The sigma-delta modulator for fractional divider is designed by the co-simualtion method for accuracy and efficiency improvement. The VCO, PFD, CP and LF are verified by Cadence Spectre, and the sigma-delta modulator is simulated using Matlab Simulink, ModelSim and HSPICE. The power consumption of the frequency synthesizer is 18mW, and the VCO has 52.1% tuning range according to the VCO maximum output frequency. The VCO phase noise is lower than -100dBc/Hz at 1MHz at 1MHz offset for 1GHz, 1.5GHz, and 2GHz output frequencies.

• The Journal of the Acoustical Society of Korea
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• v.16 no.4
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• pp.76-84
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• 1997

In this paper, one of the core components of a mobile communication system, VCO(Voltage Controlled Oscillator) IC is designed. The VCO IC was designed, have realized as LC turned oscillator using varicap. LC sinusoidal tuned oscillator generally requires external inductors and thus remainding circuit is implemneted in monolithic IC. The circuit is fabricated using an 15 mask IC process and has a die size of 1150um${\times}$780um. The tests showed that VCO was operated at frequencies in the regions between 880MHz-915MHz in the control voltage range of 1V to 3V at 5V supply voltage and as the power supply was varied from 4.5V to 5.5V, the frequency varied 425KHz/V. The VCO IC has frequency shift of 1.97MHz/T, carrier level of -7dBm and power consumption of 16.7mA. Also it has phase noise of -80dBc/Hz, offset at 50KHz and harmonic response of center frequency is -41dBm. For the future development of the transceiver 1 chip, the previously mentioned external devices need to be incorporated into Si MMIC.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.4 s.119
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• pp.423-429
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• 2007

The clock recovery module of gap filler for satellite DMB is proposed. Proposed module sustains the output frequency of 10 MHz whether the received signal from the satellite is unstable or cut off within 0.5 sec. The advantages of this module is without frequency tuning at regular interval and low material cost. This module is fabricated by using CPLD as clock recovery IC and new type of loop filter for satisfying the fast lock time and long hold over time simultaneously. The measured performance of the fabricated module has a holdover time of 11 sec at frequency stability less than 0.01 ppm, and phase noise of -113 dBc/Hz at 100 Hz offset.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.48 no.9
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• pp.54-58
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• 2011

In this paper a dual-band Class-E power amplifier using Composite Right-/Left-Handed transmission lines and PIN diode is proposed. Dual-band operation is achieved by the frequency offset and nonlinear phase slope of CRLH TL for the matching network of power amplifiers. The proposed power amplifier has been realized by using in the input and the output matching network for high power added efficiency. PIN diode has been used to obtain the dual-band of power amplifier. The measured results show that output powers of 42.17 dBm and 41.43 dBm were obtained at 800 MHz and 1900 MHz, respectively. At this frequency, we have obtained the power-added efficiency(PAE) of 67.84 % and 65.31 % in two operation frequencies, respectively.