• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.12
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• pp.2685-2692
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• 2009

We propose pulsed magnetic stimulation below 30W by the AC(60Hz) switching control of leakage transformer primary which has some advantage of cost and size compared to a typical pulsed power supply. Pulse repetition rate is adjusted from 5Hz to 60Hz to control magnetic stimulation output. In this magnetic stimulation, a low voltage open loop control for high voltage discharge circuit is employed to avoid the HV sampling or switching and high voltage leakage transformer is used to convert rectified low voltage pulse to high voltage one. A ZCS(Zero Cross Switch)circuit and a DSP & FPGA are used to control gate signal of SCR precisely. The pulse repetition rate is limited by 60Hz due to the frequency of AC line and a high leakage inductance. The maximum magnetic stimulation output was obtained about 33W at pulse repetition rate of 60Hz, total 40, 80, 120, $160^{\circ}$, SCR gate trigger angle $90^{\circ}$ and total output.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.11
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• pp.2600-2606
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• 2014

In this paper, a design method for a planar dipole pair antenna for an operation in the frequency band of 470-806 MHz for terrestrial indoor digital TV (DTV) is studied. The proposed antenna is composed of two planar dipoles connected through conducting strips, and the antenna is fed by a microstrip line. By employing different lengths of dipoles, a broadband characteristics is obtained, and the antenna is size-reduced by bending both ends of the longer dipole. The effects of design parameters on the antenna performance are examined by simulation, and the parameters are adjusted for terrestrial DTV band use. A prototype of the antenna for indoor DTV reception is fabricated on an FR4 substrate with a size of $240mm{\times}139.5mm$ and tested experimentally. The experiment results show that the frequency band for a VSWR < 2 ranges 458-864 MHz(61.4%), and it corresponds fairly well with the simulated band of 448-868 MHz(63.8%).

• Journal of the Korea Institute of Information and Communication Engineering
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• v.22 no.7
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• pp.993-1000
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• 2018

This paper proposes a low-dropout voltage regulator(LDO) using self-cascode structure. The self-cascode structure was optimized by adjusting the channel length of the source-side MOSFET and applying a forward voltage to the body of the drain-side MOSFET. The self-cascode of the input differential stage of the error amplifier is optimized to give higher transconductance, but the self-cascode of the output stage is optimized to give higher output resistance, The proposed LDO using self-cascode structure was designed by a $0.18{\mu}m$ CMOS technology and simulated using SPECTRE. The load regulation of the proposed LDO regulator was 0.03V/A, whereas that of the conventional LDO was 0.29V/A. The line regulation of the proposed LDO regulator was 2.23mV/V, which is approximately three times improvement compared to that of the conventional LDO. The transient response of the proposed LDO regulator was 625ns, which is 346ns faster than that of the conventional LDO.

• Journal of KIISE:Information Networking
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• v.30 no.1
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• pp.17-23
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• 2003

In this Paper. we Propose a digital watermarking scheme for digital images based on a perceptual model, the frequency masking, texture making, and luminance masking Properties of the human visual system(HVS), which have been developed in the context of image compression. We embed two types of watermark, one is pseudo random(PN) sequences, the other is a logo image. To embed the watermarks, original images are decomposed into $8\times8$ blocks, and the discrete cosine transform(DCT) is carried out for each block. Watermarks are casted in the low frequency components of DCT coefficients. The perceptual model adjusts adaptively scaling factors embedding watermarks according to the local image properties. Experimental results show that the proposed scheme presents better results than that of non-perceptual watermarking methods for image qualify without loss of robustness.

• The KIPS Transactions:PartB
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• v.12B no.4 s.100
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• pp.421-428
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• 2005

A new method of Semi-fragile image watermarking which ensures the integrity of the contents of digital image is presented. Proposed watermarking scheme embeds watermark in the form of quantization noise on the wavelet transform coefficients in a specific mid frequency subbands selected from a wavelet packet decomposition based on energy distribution of wavelet transform coefficients. By controlling the strength of embedded watermark using HVS (Human Visual System) characteristic, it is imperceptible by a human viewer while robust against non-malicious attack such as compression for storage and/or transmission. When an attack is applied on the original image, it is highly probable that wavelet transform coefficients not only at the exact attack positions but also the neighboring ones are modified. Therefore, proposed authentication method utilizes whether both current coefficient and its neighbors are damaged. together. So it can efficiently detect and accurately localize attacks inflicted on the content of original image. Decision threshold for authentication can be user controlled for different application areas as needed.

• Journal of Korean Society of Coastal and Ocean Engineers
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• v.8 no.1
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• pp.37-43
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• 1996

Breaking waves were generated in a 2-D flume. A piston-type wavemaker was operated in accordance with signals which consist of elementary harmonics with appropriate phase differences. These phase differences were estimated by using a linear wave theory so that wave crests were to be concentrated at the same position. The stroke of wavemaker was controlled to create plunging-type breaking waves. The signal with small amplitude could not generate breaking waves. In the case of moderate amplitudes, various breaking waves could be obtained. Most of breaking waves were spilling type. Only when the wavemaker was operated with appropriate amplitude, plunging-type breaking waves were generated. The parameters of breaking waves are the wave steepness and the frequency bandwidth. If the central frequency was low, breaking waves were not generated. Based on experimental data, we found that the wave height of breaking inception was H = 0.0113 gT$^2$. We also made computations by using a mixed Euler-Lagrangian scheme under the assumption of potential flow. The numerical results show good agreements with tank measurements.

• The Transactions of the Korean Institute of Power Electronics
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• v.4 no.6
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• pp.539-546
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• 1999

A new integrated single-stage zero current switched(ZCS) quasi resonant convertedQRC) for the IX)wer f factor correction(PFCl converter is introduced in this paper. The power factor correction can be achieved by t the discontinuous conduction mod$\varepsilon$(DCM) operation of an input current. The proposed converter has the c characteristics of the good IX)wer factor, 10씨 line current harmonics, and tight output regulation. Furthern10re, t the ringing effect due to the output capacitance of the main switch can be eliminated by use of‘ active clamp c circuit. Therefore, the proIX)sed converter is expecttc'(] to be suitable for a compact power converter with a t tightly regulated output voltage requiring a switching frequency of more than several hundrtc'(]s kHz.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.5 no.3
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• pp.101-109
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• 2012

Because the installation problem of parabola antenna that is tilted to 45 degree when this antenna is installed at the area of middle latitude, the study on planar antenna in place of parabola antenna is made rapid progess. Especially, The development of the planar antenna for VSAT is needed depending on the increased Ka-band satellite communications. In this paper, in order to meet with these performances, an array antenna consisting of the vertical polarized waveguide longitudinal slots based on the leaky-wave mode of traveling wave antenna is proposed. Especially, for the lower sidelobe level, the design method of the radiation power distribution control using the different slot widths is proposed. An array antenna consisting of 32 leakywave waveguide antennas is showing 35.16 dBi of gain, 2.5 degree of beamwidth at azimuth, below than -30 dB of sidelobe level, 45.8 degree of beam tilt angle in center frequency 30.2 GHz.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.2 no.2
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• pp.69-77
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• 2009

Small size and low profile antenna for mobile vehicular-top-mounted is needed in satellite communication services such as DBS, Satellite Internet and VSAT. In middle latitudes, the development of an array antenna which has the conformal, low profile and 45 degree beam tilted configuration, and has the high gain with sharp beamwidth, low sidelobe and low loss is required for Ka band satellite communication. In this paper, in order to meet with these performances, an array antenna consisting of the vertical polarized waveguide longitudinal slots based on the leaky-wave mode of traveling wave antenna is proposed. Especially, for the lower sidelobe level the radiation power control using a design method of the different slot width is proposed. An array antenna consisting of 32 leakywave elements is showing 34.4 dBi of gain, 3.6 degree of beamwidth, below than -25 dB of sidelobe level, 43 degree of beam tilt angle in center frequency 20.0 GHz. Feed network designed by waveguide cooperated feed shows good performance of wideband and low loss.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.11 no.5
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• pp.531-537
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• 2018

A novel PLL with a delta-sigma modulator and a spur reduction circuit is proposed. delta-sigma modulator makes the LF remove noise easily by moving the spur noise to a higher frequency band. Therefore, the magnitude of spur can be reduced the reasonable bandwidth. The spur reduction circuit reduces the spur size by reducing the LF voltage change generated during the period of reference signal. The spur reduction circuit is designed as simple as possible not to increase the size of PLL. The proposed PLL with the previous two techniques is designed with a supply voltage of 1.8V in a 0.18um CMOS process. Simulation results show an almost 20dB reduction in the magnitude of spur. The spur reduced PLL can be used in narrow bandwidth communication system.