• Proceedings of the Korean Information Science Society Conference
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• 2005.07a
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• pp.871-873
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• 2005

급속도로 IT 산업이 발전하면서, 리소스가 제한된 소형 기기들의 사용이 비약적으로 증가하는 추세이다. 자바는 플랫폼 독립성(Platform Independency), 보안성(Security), 이동성(Mobility) 등의 장점을 가지고 있기 때문에 성능을 극대화하고 안정된 서비스를 제공해야 하는 소형기기들에게 중요한 핵심 소프트웨어 플랫폼이 되어가고 있다. 임베디드 장치나 모바일 시스템과 같은 제한된 리소스를 사용하는 기기들은 자바 어플리케이션 수행을 위해 자바의 소프트웨어 플랫폼중의 하나인 K 가상 머신(K Virtual Machine: KVM)을 탑재하여 사용한다. 본 논문에서는 K 가상 머신의 가비지 컬렉션이 임베디드 환경에서 핵심 리소스인 에너지와 메모리를 좀 더 효율적으로 소비하면서 동작하는 방법에 대하여 분석하고 설계한 내용을 기술한다.

• Journal of KIISE:Computer Systems and Theory
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• v.37 no.6
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• pp.330-338
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• 2010

Flash storage devices are very popularly used in portable devices such as cell phones, PDAs and MP3 players. As technology is improved, users want much bigger and faster storage system. Paradoxically, people have to wait more and more time proportionally to the capacity of their storage devices when these are trying to be recovered after file system crash. It is serious problem because booting time of devices is dominated by crash recovery of flash file system. In this paper, we design a crash recovery mechanism, named 'Working Area(WA hereafter)' technique, which has bounded crash recovery execution time. With WA technique, write operations to flash memory are only performed in WA. Therefore, by simply scanning the latest WA. We can recover a file system crash because every change for flash memory is occured only in latest WA. We implement the WA technique based on YAFFS2 and evaluate by comparing with traditional techniques. As a result, WA technique shows that its crash recovery execution time is 25 times faster than Log-based Method when we use 1 gig a bytes NAND flash memory in worst case. This gap will be futher and futher as storage capacity grows.

• Journal of KIISE:Software and Applications
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• v.31 no.9
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• pp.1233-1245
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• 2004

Though biometrics to authenticate a person is a good tool in terms of security and convenience, typical authentication algorithms using biometrics may not be executed on resource-constrained devices such as smart cards. Thus, to execute biometric processing on resource-constrained devices, it is desirable to develop lightweight authentication algorithm that requires only small amount of memory and computation. Also, among biological features, face is one of the most acceptable biometrics, because humans use it in their visual interactions and acquiring face images is non-intrusive. We present a new face authentication algorithm in this paper. Our achievement is two-fold. One is to present a face authentication algorithm with low memory requirement, which uses support vector machines (SVM) with the feature set extracted by genetic algorithms (GA). The other contribution is to suggest a method to reduce further, if needed, the amount of memory required in the authentication at the expense of verification rate by changing a controllable system parameter for a feature set size. Given a pre-defined amount of memory, this capability is quite effective to mount our algorithm on memory-constrained devices. The experimental results on various databases show that our face authentication algorithm with SVM whose input vectors consist of discriminating features extracted by GA has much better performance than the algorithm without feature selection process by GA has, in terms of accuracy and memory requirement. Experiment also shows that the number of the feature ttl be selected is controllable by a system parameter.

• Journal of Digital Contents Society
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• v.18 no.6
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• pp.1165-1173
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• 2017

Deep learning method, which is one of the most famous machine learning algorithms, has proven its applicability in various applications and is widely used in digital signal processing. However, it is difficult to apply deep learning technology to IoT devices with limited CPU performance and memory capacity, because a large number of training samples requires a lot of memory and computation time. In particular, if the Arduino with a very small memory capacity of 2K to 8K, is used, there are many limitations in implementing the algorithm. In this paper, we propose a method to optimize the ELM algorithm, which is proved to be accurate and efficient in various fields, on Arduino board. Experiments have shown that multi-class learning is possible up to 15-dimensional data on Arduino UNO with memory capacity of 2KB and possible up to 42-dimensional data on Arduino MEGA with memory capacity of 8KB. To evaluate the experiment, we proved the effectiveness of the proposed algorithm using the data sets generated using gaussian mixture modeling and the public UCI data sets.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.2
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• pp.7-13
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• 2002

When a USB digital camera is used for PC video-conference applications, motion picture data need to be transferred to the PC through the USB port. Due to the mismatch between the data rates of the USB and the motion picture, data compression should be performed before the transmission from the USB. While many motion picture compression algorithms require large intermediate memory space, the JPEG algorithm does not need to store an entire frame for the compression. Instead, a relatively small buffer is required at the input of the JPEG compression engine to resolve the inconsistency between the orders of the inputted data and the consumed data. Data reordering can be easily implemented using a double buffering scheme, which still requires a considerable size of memory. In this paper, a novel memory management scheme is proposed to avoid the double buffering. The proposed memory architecture requires a small amount of memory and a simple address generation scheme, resulting in overall cost reduction.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.9
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• pp.75-81
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• 2014

The integral image is the sum of input image pixel values. It is mainly used to speed up processing of a box filter operation, such as Haar-like features. However, large memory for integral image data can be an obstacle on an embedded hardware environment with limited memory resources. Therefore, an efficient method to store the integral image is necessary. In this paper, we propose a memory size reduction hardware design for integral image. The hardware design is used two methods. It is the new integral image memory and modulo calculation for reducing integral image data. The new integral image memory has additional calculation overhead, but it is not obstacle in hardware environment that parallel processing is possible. In the Xilinx Virtex5-LX330T targeted experimental result, integral image memory can be reduced by 50% on a $640{\times}480$ 8-bit gray-scale input image.

• Journal of Korea Game Society
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• v.11 no.1
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• pp.147-157
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• 2011

Webcam doesn't perform memory-alignment in order to reduce the transmission time of image data. Memory-unaligned image data is unsuitable for the processing on GPU. Accordingly, we convert it to available color format for optimization in high speed image processing. In this paper, we propose a technique that accelerates webcam's color format conversion by using NVDIA CUDA. We propose an optimization which is about memory accesses and thread composition, also evaluate memory and computing performance for verifying a hypothesis which is the performance of the proposed architecture and optimizing degree on low-performance GPU. Following the optimization technique, we show performance improvements over maximum 68 percent.

• The Journal of Society for e-Business Studies
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• v.8 no.2
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• pp.33-48
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• 2003

Wireless Internet, created through the merging of mobile communication with Internet technology, provides the advantage of mobility, but the restrictions of the mobile environment are deterring it from growing into a mass public service. Of the restricting factors of the wireless environment, narrow memory space creates the disadvantage of not being able to manage resources in mobile devices efficiently Because there is a limit to obtaining sufficient memory space from hardware made with consideration of portability, future devices will need to have a platform design with storage area extended from internal storage to external storage space. In this paper, we present a mobile agent that extends the memory space from only the inside of a mobile device to an external server making it possible to use data by on-line Run-time, and can also manage internal files efficiently. We have designed and implemented a RMS(Resources Management System) as a realization. Devices using the proposed RMS will be able to apply extended processes with the 'Mobile Space Extension' and will be benefited with optimal memory space through efficient internal file management.

• Journal of KIISE:Computer Systems and Theory
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• v.36 no.5
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• pp.422-428
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• 2009

NAND flash memory is widely used in embedded systems because of many attractive features, such as small size, light weight, low power consumption and fast access speed. However, it requires garbage collection, which includes erase operations. Erase operation is slower than other operations. Further, a block has a limited erase lifetime (typically 100,000) after which a block becomes unusable. The proposed garbage collection policy focuses on minimizing the total number of erase operations, the deviation value of each block and the garbage collection time. NAND flash memory consists of pages of three types, such as valid pages, invalid pages and free pages. In order to achieve above goals, we use a page ratio to decide when to do garbage collection and to select the target victimblock. Additionally, we implement allocating method and group management method. Simulation results show that the proposed policy performs better than Greedy or CAT with the maximum rate 85% of reduction in the deviation value of the erase operations and 6% reduction in garbage collection time.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.9
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• pp.1332-1347
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• 1993

Existing instruments are composed independently according to their function and user constructed instrumentation system with those instruments. But in the late 1980s VXI bus enables to construct instrumentation system with various modular type instruments. For an VXI bus system with the word serial protocol, an increase of data size can degrade the system performance. In this paper shared memory protocol is proposed to overcome performance degradation. The shared memory protocol is analyzed using the GSPN and compared with that of the word serial protocol. It is shown that the shared memory protocol has a better performance than the word serial protocol. The VXI bus message based-system with the proposed shared memory protocol is constructed and experimented with signal generating device and FFT analyzing device. Up to 80 KHz input signal the result of FFT analysis is accurate and that result is agree with that of conventional FFT analyzer. In signal generating experiment from 100 KHz to 1.1 GHz sine wave is generated.