• Title/Summary/Keyword: 정상 모드

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Reliability assessment of mica high voltage capacitor through environmental test and accelerated life test (마이카 고전압 커패시터의 환경시험과 가속 수명시험을 통한 신뢰성 평가)

  • Park, Seong Hwan;Ham, Young Jae;Kim, Jeong Seok;Kim, Kyoung Hun;So, Seong Min;Jeon, Min Seok
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.29 no.6
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    • pp.270-275
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    • 2019
  • Mica capacitor is being adopted for high voltage firing unit of guided weapon system because of its superior impact enduring property relative to ceramic capacitor. Reliability of localized mica high voltage capacitors was verified through environmental test like terminal strength test, humidity test, thermal shock test and accelerated life test for application to high voltage firing unit. Failure mode of mica capacitor is a decrease of insulation resistance and its final dielectric breakdown. Main constants of accelerated life model were derived experimentally and voltage constant and activation energy were 5.28 and 0.805 eV respectively. Lifetime of mica capacitor at normal use condition was calculated to be 38.5 years by acceleration factor, 496, and lifetime at accelerated condition and this long lifetime confirmed that mica high voltage capacitor could be applied for firing unit.

Digitally controlled phase-locked loop with tracking analog-to-digital converter (Tracking analog-to-digital 변환기를 이용한 digital phase-locked loop)

  • Cha, Soo-Ho;Yoo, Chang-Sik
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.9 s.339
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    • pp.35-40
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    • 2005
  • A digitally controlled phase-locked loop (DCPLL) is described. The DCPLL has basically the same structure as a conventional analog PLL except for a tracking analog-to-digital converter (ADC). The tracking ADC generates the control signal for voltage controlled oscillator. Since the DCPLL employs neither digitally controlled oscillator nor time-to-digital converter-the key building blocks of digital PLL (DPLL), there is no need for the 03de-off between jitter, power consumption and silicon area. The DCPLL was implemented in a $0.18\mu$m CMOS process and the active area is 1mm $\times$0.35 mm The DCPLL consumes S9mW during the normal opuation and $984\{mu}W$ during the power-down mode from a 1.8V supply. The DCPLL shows 16.8ps ms jitter.

Fault Management Design Verification Test for Electrical Power Subsystem and Attitude and Orbit Control Subsystem of Low Earth Orbit Satellite (저궤도위성의 전력계 및 자세제어계 고장 관리 설계 검증시험)

  • Lee, Sang-Rok;Jeon, Hyeon-Jin;Jeon, Moon-Jin;Lim, Seong-Bin
    • Aerospace Engineering and Technology
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    • v.12 no.2
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    • pp.14-23
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    • 2013
  • Fault management design of the satellite describes preparations for failures which can occur during operational phase. Fault management design contains detection and isolation function of anomaly, and also it contains function to maintain the satellite in safe condition until the ground station finds out a cause of failure and takes a countermeasure. Unlike normal operation, safing operation is automatically performed by Power Control and Distribution Unit and Integrated Bus Management Unit which loads Flight Software without intervention of ground station. Since fault management operation is automatical, fault management logic and functionality of relevant hardware should be thoroughly checked during ground test phase, and error which is similar to actual should be carefully applied without damage. Verification test for fault management design is conducted for various subsystems of satellite. In this paper, we show the design process of fault management design verification test for Electrical Power Subsystem and Attitude and Orbit Control Subsystem of Low Earth Orbit satellite flight model and the test results.

Q-Switched Nd YAG's SHG conversion techniques for a skin diseased treatment (피부질환 치료를 위한 Q-Switched Nd:YAG의 SHG 변환기술)

  • Kim, Whi-Young
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.6
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    • pp.1141-1149
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    • 2009
  • Pulse style Nd: YAG Laser is suitable in skin remaking treatment, in compliance with the ramp continuous oscillation until of course normal takeoff, the Q-switch and mode motive takeoff the takeoff form which is various is possible and it is coming to be widely used in microsurgery and skin remaking promotion. According to therapeutic objective very it is important to control a energy density. Control of energy density the method which controls the pulse repetition rate of Laser output is mainly used. From the research which it sees pulse style Nd: It will be able to control the pulse repetition rate of YAG, the 2nd harmonic occurrence Laser (second harmonic generation: SHG) with the energy part of the light-wave which is a footnote wave number will hold and nonlinear decision it propagates and is converted by energy of the light-wave which is a footnote wave number the actual condition which and it applies the second harmonic occurrence in compliance with a secondary nonlinearity it leads and until skin deep part therapeutic possibility is the thing it will be able to observe simply.

High Efficiency Resonant Flyback Converter using a Single-Chip Microcontroller (싱글칩 마이크로컨트롤러를 이용한 고효율 공진형 플라이백 전력변환기)

  • Jeong, Gang-Youl
    • Journal of IKEEE
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    • v.24 no.3
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    • pp.803-813
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    • 2020
  • This paper presents a high efficiency resonant flyback converter using a single-chip microcontroller. The proposed converter primary performs the resonant switching by applying the asymmetrical pulse-width modulation (APWM) to the half-bridge power topology. And the converter secondary uses the diode flyback rectifier as its power topology and operates with the zero current switching (ZCS). Thus the proposed converter achieves high efficiency. The total structure of proposed converter is very simple because it uses a single-chip microcontroller and bootstrap circuit for its control and drive, respectively. First, this paper describes the converter operation according to each operation mode and shows its steady-state analysis. And the software control algorithm and drive circuits operating the proposed converter are explained. Then, the operation characteristics of proposed converter are shown through the experimental results of an implemented prototype based on each explanation.

Effects of Structural Parameter Variations on Dynamic Responses (해석(解析)모델의 구조변수(構造變數) 변동(變動)이 동적응답에 미치는 영향(影響))

  • Park, Hyung Ghee;Lim, Boo Young
    • KSCE Journal of Civil and Environmental Engineering Research
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    • v.13 no.3
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    • pp.59-67
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    • 1993
  • The variations of the natural frequencies and the peak response acceleration at the top of prestressed concrete reactor building due to random variability and/or model uncertainty of structural parameters are studied. The results may be used as essential input parameters in seismic probabilistic risk assessment or seismic margin assessment of the reactor building. The sensitivity test of each structural parameter is first performed to determine the most influential parameter upon the natural frequency of structure model. Then Monte Carlo simulation technique is applied to evaluate the effect of parameter variation on the natural frequencies and the peak response acceleration. The acceleration time history is obtained by direct integration scheme. As the study results, it is found that the fundamental natural frequency and the peak response acceleration at the top of the building are most strongly affected by Young's modulus among the structural parameters, in which the value of mean plus one standard deviation obtained by probabilistic approach deviates up to about (+)12% from the result of deterministic method. Considering the uncertainty of flexural rigidity, the structural responses vary in range of (-)4%~(+)14%.

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A Design of Integral Sliding Mode Suspension Controller to Reject the Disturbance Force Acting on the Suspension System in the Magnetically Levitated Train System (자기부상 열차 시스템에서 추진 장치에서 발생하는 부상 간섭력의 영향을 제거하기 위한 적분형 Sliding Mode 부상 제어기 설계)

  • Lee, Jun-Ho
    • Transactions of the Korean Society for Noise and Vibration Engineering
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    • v.17 no.12
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    • pp.1152-1160
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    • 2007
  • In this paper we deal with a design of integral sliding mode controller to reject the disturbance force acting on the suspension system in the magnetically levitated system which is propelled by the linear induction motor. The control scheme comprises an integral controller which is designed for achieving zero steady-state error under step disturbances, and a sliding mode controller which is designed for enhancing robustness under plant uncertainties. A proper continuous design signal is introduced to overcome the chattering problem. The disturbance force produced by the linear motor is formularized by using a curve fitting of the experimental raw data. Computer simulations show the effectiveness of the designed integral sliding mode controller to reject the disturbance force.

Design of Receiver Architecture for HomePNA 2.0 Modem (HomePNA 2.0 모뎀 수신부 설계)

  • Choi, Sung-Woo;Kim, Jong-Won
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.9A
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    • pp.991-997
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    • 2004
  • In this paper, we propose the architecture of modem receiver to fabricate HomePNA 2.0 chip. HomePNA suffers from inferior channel because of bridge tap, the effect of amateur HAM band and so on. To transfer data over such channel, HomePNA 2.0 uses training sequence to equalize channel and uses FD-QAM optionally as modulation method. So modem receiver demodulate QAM based signal and needs optimum architecture that fully uses these transmission feature. As a result of research, we define 2 mode function of modem receiver depending on TX/RX state. In this paper, particularly, we show the algorithm of equalizer, carrier phase recovery and frame synchromzationblock and propose architecture that improve the performance of channel equalization and is stable in operation. In the end, we estimate the performance of proposed HomePNA2.0 modem receiver over HomePNA TEST LOOP using SPW program.

헬륨냉동계통의 헬륨가스 순도 제어 운전

  • Choe, Ho-Yeong;Son, U-Jeong;Lee, Mun;An, Guk-Hun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.08a
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    • pp.171-171
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    • 2011
  • 헬륨냉동계통은 연구용 원자로인 하나로에서 냉중성자를 생산할 수 있도록 설치된 수조내기기 내의 감속재인 수소가 정상적으로 열 사이펀을 유지하기 위한 주요 계통이다. 헬륨냉동계통은 헬륨가스를 압축하는 헬륨 압축부분과 헬륨가스를 팽창시켜 저온을 생성시키는 헬륨 팽창부분으로 나누어진다. 헬륨 압축부분은 두 개의 스크류가 맞물려 회전하면서 약 1.05 bar(a)의 헬륨가스를 최대 13 bar(a)까지 압축시키는 압축기가 있으며, 헬륨 팽창부분인 냉동박스의 팽창 터빈은 self-acting gas bearing에 의해 구동되며, 저온모드 운전 시작시 헬륨 압축부분에서 일부의 가스는 팽창 터빈 축(shaft)으로 유입되어 회전속도가 서서히 증가하면서 고속으로 회전하여 극저온의 헬륨가스(14~18 K)를 생성하는 주요 기기이다. 헬륨을 팽창하는 부분인 냉동박스 내로 헬륨 압축가스를 유입하기 전에 압축된 헬륨가스 내 불순물의 순도를 분석하여 냉동박스의 주요 부품인 팽창터빈의 운전에 영향을 미치지 않는 것이 가장 중요하다. 따라서 헬륨 저압측에 헬륨가스 내 불순물 즉, 수소($H_2$), 수분($H_2O$), 질소($N_2$), 탄화수소류(CxHy) 및 오일(Oilaerosol) 등의 함량을 분석하기위해 가스 분석기가 설치되어 있으며, 냉동박스 내로 유입되기 전에 헬륨압축에서 순환되는 가스 내 불순물인 수분, 질소, 탄화수소류 및 오일은 10 vpm 이하이어야 하며, 수소 함량은 0.1 % 이내이어야 한다. 헬륨 압축부분에서 순환되는 가스의 불순물이 요구 조건에 만족하도록 헬륨 고압측과 헬륨 저압측에 cryogenic adsorber를 설치하여 가스 내 불순물을 제거하는 가스순도제어 작업을 수행해야 한다. cryogenic adsorber를 사용하기 위해서는 장치 내의 불순 가스를 공정진공도(1.33 X $10^{-3}$ mbar) 이하로 진공배기하는 작업이 매우 중요하다. 이는 계통의 헬륨가스가 오염되지 않도록 하는 것으로 cryogenic adsorber 내에는 액체질소를 충전하여 액체질소 온도에 노출된 활성탄층을 헬륨가스가 흐르면서 수분, 질소, 탄화수소류 및 오일 등이 제거된다. 이 논문에서는 헬륨냉동계통의 가스 순도 제어 작업을 통해 헬륨가스의 순도가 요구조건 이하로 만족하며, 팽창 터빈의 운전에 영향을 미치지 않음을 기술하고자 한다.

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The Constant Output Power Control of SSRT FB DC-DC Converter by an Improved Phase-shift Control (개선된 위상 천이 제어에 의한 소프트 스위칭 공진형 FB DC-DC 컨버터의 정출력 제어)

  • 신동률;조용길;김동완;우정인
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.14 no.5
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    • pp.27-35
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    • 2000
  • This paper deals with a control strategy for constant output power of SSRT(Soft Switching Resonant Type) FB(Full Bridge) DC-DC converter by an improved phase shift controller. When the FB DC-DC converter for the high density and the high effect control is operated in high speed switching, the switching loss and switching stress of the switching devices are increased. So, the soft switching method, which has the phase shift control with the digital I-PD controller, must be use in order to reduce its. And the output voltage that controlled by the digital I-PD controller tracks a reference without steady state error in variable input voltage. The validity of control strategy that proposed is verified from simulation results and experimental results by the DSP(TMS320C32).

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