• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.05a
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• pp.795-797
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• 2013

This paper describes a charge sharing capacitive-sensing circuit technique that improves the quality of images captured with fingerprint sensor LSIs. When the finger is dry, the electrical resistance of a finger surface is high. It leads to poor image quality. To capture clear images even when the finger is dry, the modified capacitive detection circuit improves the image quality using an enhancement plate at the finger surface and a voltage control circuit. The test circuit is analyzed on $0.35{\mu}m$ CMOS process.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.6
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• pp.1343-1348
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• 2011

A modified capacitive detection circuit of charge sharing scheme is proposed, which reduces the static power dissipation and increases the voltage difference between a ridge and valley more than a conventional circuit. The detection circuit is designed and simulated in 3.3V, $0.35{\mu}m$ standard CMOS process, 40MHz condition. The result shows about 47% power dissipation reduction and 90% improvement of difference between a ridge and valley sensing voltage. The proposed circuit is layout without area increasing of a one pixel.

• Journal of the Korea Computer Industry Society
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• v.4 no.12
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• pp.1013-1020
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• 2003

In this paper, the discharge properties due to time variation were investigated in order to estimate a electrical performance of the insulator for small transformer. AC 10[kVl applied to specimen was converted to $\pm$5[V] and stored to personal computer through A/D converter. A period of applied wave form and discharge values were divided into 64 parts and discharge values generated during 10 seconds were accumulated by phases. As a result, it was confirmed that count of discharge, total discharge and the variation degree of average discharge were decreased as time elapsed.

• Proceedings of the KIEE Conference
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• 2001.11a
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• pp.29-31
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• 2001

본 논문에서는 고속철도 주변의 상용주파수(60 Hz) 대역의 전계 해석에 촛점을 두고 경계분할법의 일종인 전하중첩법과 표면전하법을 사용하여 선로주변의 전계 계산을 수행하였다. 계산 결과 지상 1m 열차 플랫폼 주변에서의 전계값은 0.5kV/m 이하로써 국제비전리방사보호위원회 (ICNIRP)의 권고 기준인 4.167kV/m를 충분히 만족함을 알 수 있었으며 사용자 편의를 위해 전계 해석용 프로그램을 윈도우 환경하에서 MFC를 이용하여 개발하였다.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2002.11a
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• pp.375-379
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• 2002

본 논문에서는 수 만개이상의 미지수를 필요로 하는 복잡한 3차원 구조에서의 정전용량 추출을 위한 고속화 알고리즘(Fast mutilpole method)과 결합한 효과적인 적응 삼각요소 분할법(Adaptive triangular mesh refinement algorithm)을 제안하였다. 요소세분화과정은 초기요소로 전하의 분포를 구하고, 전하밀도가 높은 영역에서의 요소세분화를 수행하여 이루어진다. 제안된 방법을 이용하여 많은 미지수를 필요로 하는 IC packaging 구조에서의 정전용량을 추출하였다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.1
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• pp.27-32
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• 2003

This paper describes to extend the fast algorithm fur the capacitance extraction of large three-dimensional object. The triangular meshes are used and refined adaptively in the area where the heavy charges reside in each iterative solving. This technique is applied to the capacitance extraction of a 68-pin cerquad package. The results show fast convergence, and this adaptive technique coupled with the fast algorithm is efficient to reduce the number of elements and computing time with least additional computational efforts in large three dimensional problems.

• Journal of IKEEE
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• v.26 no.3
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• pp.500-505
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• 2022

In this study, we designed oxide thin-film transistors (TFTs) with dual gate and tri layered split channels, and investigated the structural effect of the TFTs on the electrical characteristics. The dual gates played a key role in increasing the driving current, and the channel structure of tri layers and split form contributed to the increase in the carrier mobility. The tri layered channels consisting of the a-ITGZO and two ITO layers inserted between the gate dielectric and a-ITGZO led to the increase in the on-current by using ITO layers with high conductivity, and the split channels lowered series resistance of the channels. Compared with the mobility (15 cm²/V·s) of the single gate a-ITGZO TFT, the mobility (134 cm²/V·s) of the dual gate tri-layer split channel TFT was remarkably enhanced by the structural effect.

• Journal of Sensor Science and Technology
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• v.14 no.1
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• pp.28-32
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• 2005

In this paper, a CMOS integrated detection circuit for capacitive type fingerprint sensor signal processing is described. We designed a detection circuit of charge-sharing sensing scheme. The proposed detection circuit increases the voltage difference between a ridge and valley. The test chip is composed of $160{\times}192$ array sensing cells (12 by $12.7{\;}mm^{2}$). The chip was fabricated on a 0.35 m standard CMOS process. Measured difference voltage between a ridge and valley was 0.95 V.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.4A
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• pp.466-471
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• 2004

This paper proposes an advanced circuit for fingerprint sensor signal processing. We increased the voltage between ridge and valley by modifying the parasitic capacitance eliminating circuit of sensor plate. The analog comparator was designed for comparing the sensor signal voltage with the reference signal voltage. 1-Pixel Fingerprint sensor circuit was designed and simulated, and the layout was performed.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.3
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• pp.109-114
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• 2004

This paper proposes an advanced circuit for the fingerprint sensor signal processing. We increased the voltage between ridge and valley by modifying the parasitic capacitance eliminating circuit of sensor plate. The analog comparator was designed for comparing the sensor signal voltage with the reference signal voltage. We also propose an effective isolation strategy for removing noise and signal coupling of each sensor pixel. The fingerprint sensor circuit was designed and simulated, and the layout was performed.