• Title/Summary/Keyword: 전압제어 발진기

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Design of Low Phase Noise Frequency Synthesizer for Digital MMDS Downconverter (디지털 MMDS 하향변환기용 저 위상잡음 주파수 합성기의 설계)

  • 김영진
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.6 no.2
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    • pp.151-158
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    • 2002
  • In this paper, Phase locked microwave oscillator having the low phase noise and high stability for digital MMDS down converter was designed. we have been analyzed the low phase noise properties by the active device nonlinear equivalent circuits and derived the necessary and sufficient conditions for high stable voltage control oscillator. And it is applied to phase locked loop, we design the phase locked microwave oscillator of frequency synthesizer. Experimental results of designed phase locked oscillator shows -85dBc/Hz @ 10KHz phase noise properties and simulation result is -90Bc/Hz @ 10kHz respectively we shows that proposed low phase noise and stable conditions of phase locked microwave oscillator can be applied to design the high stable digital MMDS frequency synthesizer.

Hybrid Balanced VCO Suitable for Sub-1V Supply Voltage Operation (1V 미만 전원전압 동작에 적합한 혼성 평형 전압제어 발진기)

  • Jeon, Man-Young;Kim, Kwang-Tae
    • The Journal of the Korea institute of electronic communication sciences
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    • v.7 no.4
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    • pp.715-720
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    • 2012
  • This study presents a hybrid balanced voltage controlled oscillator (VCO) circuit which is suitable for low phase noise operation at sub-1V supply voltages. Half circuits of the proposed VCO use the varactor-integrated feedback capacitors in their respective circuit. The varactor-integrated feedback capacitors further increase the negative resistance of the equivalent tank thereby ensuring stable start-up of oscillation even at the sub-1V supply voltage. In addition, this work theoretically analyses the phenomenon of the increase of the negative resistance. Simulation results using a $0.18{\mu}m$ RF CMOS technology exhibit the phase noises of -122.4 to -125.5.8 dBc/Hz at 1 MHz offset from oscillation frequency of 4.87 GHz over the supply voltages of 0.6 through 0.9 V.

A Design of Voltage Controlled Oscillator and High Speed 1/4 Frequency Divider using 65nm CMOS Process (65nm CMOS 공정을 이용한 전압제어발진기와 고속 4분주기의 설계)

  • Lee, Jongsuk;Moon, Yong
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.11
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    • pp.107-113
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    • 2014
  • A VCO (Voltage Controlled Oscillator) and a divide-by-4 high speed frequency divider are implemented using 65nm CMOS technology for 60GHz wireless communication system. The mm-wave VCO was designed by NMOS cross-coupled LC type using current source. The architecture of the divide-by-4 high speed frequency divider is differential ILFD (Injection Locking Frequency Divider) with varactor to control frequency range. The frequency divider also uses current sources to get good phase noise characteristics. The measured results show that the VCO has 64.36~67.68GHz tuning range and the frequency divider divides the VCO output by 4 exactly. The high output power of 5.47~5.97dBm from the frequency divider is measured. The phase noise of the VCO including the frequency divider are -77.17dBc/Hz at 1MHz and -110.83dBc/Hz at 10MHz offset frequency. The power consumption including VCO is 38.4mW with 1.2V supply voltage.

A Low Phase Noise Design of Voltage Controlled Dielectric Resonator Oscillator and Reliability Analysis (전압제어 유전체 공진 발진기의 저위상잡음 설계 및 신뢰도 분석)

  • Ryu Keun-Kwan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.2
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    • pp.408-414
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    • 2005
  • The VCDRO(Voltage Controlled Dielectric Resonate. Oscillator) with low phase noise is designed using nonlinear analysis, and its phase noise characteristics are compared with that of Lesson's equation. The microstripline coupled with dielectric resonator is realized as a high impedance inverter to improve the phase noise performance, and the quality factor of resonator circuit can be transferred to active device with the enhanced the loaded quality factor. The worst case and part stress analyses are achieved to obtain the high reliability of VCDRO and the reliability analysis is accomplished to estimate the probability of operation at the end of life. The developed VCDRO has the oscillating tuning factor of 0.56MHZ1V for the control voltage range of 0-l2V. This VCDRO requires the DC power of 136mW. The phase noise characteristics exhibit good performances of -94.18dBc/Hz (a)10KHz and -116.3dBc/Hz (a)100KHz. And, the output power over 7.33dBm is measured.

A Design of Push-push Voltage Controlled Oscillator using Frequency Tuning Circuit with Single Transmission Line (단일 전송선로의 주파수 동조회로를 이용한 push-push 전압제어 발진기의 설계 및 제작)

  • Ryu, Keun-Kwan;Kim, Sung-Chan
    • Journal of IKEEE
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    • v.16 no.2
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    • pp.121-126
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    • 2012
  • In this paper, a push-push VCDRO (Voltage Controlled Dielectric Resonator Oscillator) with a modified frequency tuning structure is investigated. The push-push VCDRO designed at 16GHz is manufactured using a LTCC (Low Temperature Co-fired Ceramic) technology to reduce the circuit size. The frequency tuning structure is embedded in intermediate layer of A6 substrate by an advantage of LTCC process. Experimental results show that the fundamental frequency suppression is above 30dBc, the frequency tuning range is 0.43MHz over control voltage of 0 to 12V, and phase noise of push-push VCDRO presents a good performance of -103dBc/Hz at 100KHz offset frequency from carrier.

이동통신용 전압제어 발진기(VCO)의 구성 및 발전 동향

  • 엄경환;박동철
    • The Magazine of the IEIE
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    • v.24 no.1
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    • pp.38-46
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    • 1997
  • 최근 몇 년 동안 이동통신에 대한 시장 규모는 급성장을 보여왔다. 이러한 시장규모 성장에 힘입어 단말기에 사용되는 RF부품 제작 기술 또한 급진전됐으며 이동통신용 RF부품은 과거에 비해 놀라울 정도로 소형 경량화 되어 단말기의 휴대성을 더욱 높이고 있다. 특히 전압 제어 발진기의 경우 지난 10년 사이에 1/30 정도로 크기가 축소 됐으며 향후로도 계속적으로 축소되어 좀더 휴대하기 간편하고 편리한 다 기능의 단말기를 가능하게 할 것이다. 본 고에서는 과거 10년 동안의 전압제어발진기의 발전동향 및 추세를 살펴보고 현재 사용되는 전압제어 발진기의 구조 및 회로 동작 원리를 설명하고자 한다. 또한 향후 계속되어야 할 전압제어 발진기의 발전 방향을 전망해 보고자 한다.

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Improvement of Phase Noise Characteristics for Tuning Voltage in Voltage Controlled Oscillator using Coupled Microstrip Lines (결합 마이크로스트립 라인을 이용한 전압제어 발진기의 동조전압에 따른 위상잡음 특성 개선)

  • Ryu, Keun-Kwan;Shin, Dong-Hwan;Yom, In-Bok;Kim, Sung-Chan
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.5A
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    • pp.513-518
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    • 2010
  • Improvement of phase noise characteristics in a different approach of HEMT VCO (Voltage Controlled Oscillator) with coupled microstrip lines to tune the oscillating frequency is investigated. Two HEMT VCOs of 9.8GHz are manufactured in the same configuration except for the frequency tuning circuit in order to empirically demonstrate the phase noise reduction. Experimental result shows that phase noise reduction can be enhanced 8dBc/Hz at 100KHz offset frequency from carrier by frequency tuning circuit with coupled microstrip lines over the conventional VCO.

Design of a Low Noise Ultraminiature VCO using the InGap/GaAs HBT Technology (InGaP/GaAs HBT 기술을 이용한 저잡음 극소형 VCO 설계)

  • 전성원;이상설
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.15 no.1
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    • pp.68-72
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    • 2004
  • The integrated voltage-controlled-oscillator(VOC) operating at 1.75 ㎓ is designed using the InGaP/GaAs HBT process. The proposed noise removal circuit and FR-4 substrate structure in this letter show the better characteristic of the phase noise and reduce the size of the VCO. The frequency tuning range of the VCO is about 200 ㎒ and the phase noise at 120 ㎑ offset is -119.3 ㏈c/㎐. The power consumption of the VCO core is 11.2 ㎽ at 2.8 V supply voltage and the output power is -2 ㏈m. The calculated figure of merit(FOM) is 191.7, which shows the best performance compared with the previous FET or HBT VCO.

The Open Loop Multiple Split Ring Resonator Based Voltage Controlled Oscillator in 0.13 um CMOS (개방 루프 다중 분할 링 공진기를 이용한 0.13 um 전압 제어 발진기 설계)

  • Kim, Hyoung-Jun;Choi, Jae-Won;Seo, Chul-Hun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.2
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    • pp.202-207
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    • 2010
  • In this paper, a novel voltage-controlled oscillator(VCO) using the open loop multiple split ring resonator(OLMSRR) is presented for improving the phase noise, implemented in 130 nm CMOS technology. Compared with the conventional CMOS LC resonator, the proposed CMOS OLMSRR has the larger coupling coefficient value, which makes a higher Q-factor, and has improved the phase noise of the VCO. The proposed CMOS VCO based OLMSRR has the phase noise of -99.67 dBc/Hz @ 1 MHz in the oscillation frequency. Compared with the VCO using the conventional CMOS LC resonator and the proposed VCO using the CMOS OLMSRR structure has been improved in 7 dB. The prototype 24 GHz CMOS VCO is implemented in 130 nm CMOS and occupies a compact die area of $0.7\;mm{\times}0.9\;mm$.

Low Phase Noise Push-Push VCO Using Microstrip Square Open Loop Resonator and Tunable Negative Resistance (마이크로스트립 사각 개방 루프 공진기와 가변 부성 저항을 이용한 저위상 잡음 Push-Push 전압 제어 발진기)

  • Choi, Jae-Won;Seo, Chul-Hun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.18 no.8
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    • pp.847-853
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    • 2007
  • In this paper, a novel push-push voltage-controlled oscillator(VCO) using microstrip square open loop resonator and tunable negative resistance is presented. The microstrip square open loop resonator has the large coupling coefficient value, which makes a high Q value, and has reduced phase noise of VCO. The VCO with 1.8V power supply has phase noise of $-124.67{\sim}-122.67dBc/Hz\;@\;100 kHz$ in the tuning range, $5.744{\sim}5.859 GHz$. The FOM of this VCO is $-202.83{\sim}-201dBc/Hz\;@\;100 kHz$ in the same tuning range. When it has been compared with single-ended VCO using microstrip square open loop resonator, and push-push oscillator using microstrip line resonator, the reduced phase noise has been -8.51dB, and -33.67dB, respectively.