• Title/Summary/Keyword: 전류 제어 루프

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Characteristics of Time-Changing Electric and Magnetic Fields at a High Voltage Laboratory (고전압 실험실에서 시변성 전자계의 특성)

  • 이복희;이경옥;안창환
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.8 no.1
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    • pp.83-93
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    • 1997
  • This paper deals with measurements and evaluation of the time-changing electric and magnetic fields at a high-voltage laboratory. The electromagnetic disturbances originate mainly from ground faults and on/off operations of electric power equipments. The electronic circuits and control devices are very sensitive to electromagnetic interferences. It is necessory to evaluate the levels of interferences for a given electromagnetic environment. The electric field was observed by the electric field sensor having the bandwidth of the range from 40 Hz to 200 MHz, and the time-changing magnetic field was measured by the loop sensor of which the output is directly proportional to the incident signal. Also, the frequency components of the time-changing electric and magnetic fields induced by an oscillatory transient current and a chopped impulse voltage were analyzed by terms of the fast Fourier transformation, and those give the information about the levels of the electromagnetic interferences and the design of the electromagnetic shielding enclosures.

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Active Power Filter Type Uninterruptible Power Supply (UPS) (전력용 능동필터형 무정전 전원장치)

  • 김제홍;최재호
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.12 no.4
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    • pp.100-105
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    • 1998
  • This paper proposes a new control strategy of bidirectional uninterruptible power supply (UPS) with the performance of active power filter which compensates the harmonics and reactive power. With only one power stage, it is working simultaneously as the AC/DC rectifier/battery charger and DC/AC inverter to the operation of battery charging or back-up power supplying. Therefore the operation of the proposed system can be divided into the modes, such as the active power filter mode and the battery back-up power mode. And a novel closed-loop control strategy is used to calculate the reference current. The performance of the proposed 5[kVA] system is verified by the simulation and experimental results.

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A Radio-Frequency PLL Using a High-Speed VCO with an Improved Negative Skewed Delay Scheme (향상된 부 스큐 고속 VCO를 이용한 초고주파 PLL)

  • Kim, Sung-Ha;Kim, Sam-Dong;Hwang, In-Seok
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.42 no.6
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    • pp.23-36
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    • 2005
  • PLLs have been widely used for many applications including communication systems. This paper presents a VCO with an improved negative skewed delay scheme and a PLL using this VCO. The proposed VCO and PLL are intended for replacing traditional LC oscillators and PLLs used in communication systems and other applications. The circuit designs of the VCO and PLL are based on 0.18um CMOS technology with 1.8V supply voltage. The proposed VCO employs subfeedback loops using pass-transistors and needs two opposite control voltages for the pass transistors. The subfeedback loops speed up oscillation depending on the control voltages and thus provide a high oscillation frequency. The two voltage controls have opposite frequency gain characteristics and result in low phase-noise. The 7-stage VCO in 0.18um CMOS technology operates from $3.2GHz\~6.3GHz$ with phase noise of about -128.8 dBc/Hz at 1MHz frequency onset. For 1.8V supply voltage, the current consumption is about 3.8mA. The proposed PLL has dual loop-filters for the proposed VCO. The PLL is operated at 5GHz with 1.8V supply voltage. These results indicate that the proposed VCO can be used for radio frequency operations replacing LC oscillators. The circuits have been designed and simulated using 0.18um TSMC library.

Simulation and Control of the Molten Carbonate System using Aspen $Dynamics^{TM}$ and ACM (Aspen $Dynamics^{TM}$와 ACM을 이용한 용융탄산염 연료전지 시스템의 모사 및 제어)

  • Jeon, Kyoung Yein;Kwak, Ha Yeon;Kyung, Ji Hyun;Yoo, Ahrim;Lee, Tae Won;Lee, Gi Pung;Moon, Kil Ho;Yang, Dae Ryook
    • Korean Chemical Engineering Research
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    • v.49 no.4
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    • pp.423-431
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    • 2011
  • Recentincreasing awareness of the environmental damage caused by the $CO_2$ emission of fossil fuelsstimulated the interest in alternative and renewable sources of energy. Fuel cell is a representative example of hydrogen energy utilization. In this study, Molten Carbonate Fuel Cell system is simulated by using $Aspen^{TM}$. Stack model is consisted of equilibrium reaction equations using $ACM^{TM}$(Aspen Custom Modeler). Balance of process of fuel cell system is developed in Aspen $Plus^{TM}$ and simulated at steady-state. Analysis of performance of the system is carried out by using sensitivity analysis tool with main operating parameters such as current density, S/C ratio, and fuel utilization and recycle ratio.In Aspen $Dynamics^{TM}$, dynamics of MCFC system is simulated with PID control loops. From the simulation, we proposed operation range which generated maximum power and efficiency in MCFC power plant.

A 3.2Gb/s Clock and Data Recovery Circuit without Reference Clock for Serial Data Communication (시리얼 데이터 통신을 위한 기준 클록이 없는 3.2Gb/s 클록 데이터 복원회로)

  • Kim, Kang-Jik;Jung, Ki-Sang;Cho, Seong-Ik
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.46 no.2
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    • pp.72-77
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    • 2009
  • In this paper, a 3.2Gb/s clock and data recovery (CDR) circuit for a high-speed serial data communication without the reference clock is described This CDR circuit consists of 5 parts as Phase and frequency detector(PD and FD), multi-phase Voltage Controlled-Oscillator(VCO), Charge-pumps (CP) and external Loop-Filter(KF). It is adapted the PD and FD, which incorporates a half-rate bang-bang type oversampling PD and a half-rate FD that can improve pull-in range. The VCO consists of four fully differential delay cells with rail-to-rail current bias scheme that can increase the tuning range and tuning linearity. Each delay cell has output buffers as a full-swing generator and a duty-cycle mismatch compensation. This materialized CDR can achieve wide pull-in range without an extra reference clock and it can be also reduced chip area and power consumption effectively because there is no additional Phase Locked- Loop(PLL) for generating reference clock. The CDR circuit was designed for fabrication using 0.18um 1P6M CMOS process and total chip area excepted LF is $1{\times}1mm^2$. The pk-pk jitter of recovered clock is 26ps at 3.2Gb/s input data rate and total power consumes 63mW from 1.8V supply voltage according to simulation results. According to test result, the pk-pk jitter of recovered clock is 55ps at the same input data-rate and the reliable range of input data-rate is about from 2.4Gb/s to 3.4Gb/s.

Design of Triple Loop Current Control for Auxiliary Power Unit of Fuel Cell Train having Grid Connected Inverter Function (계통 연계 기능을 갖는 연료전지 철도차량 보조전원장치의 삼중 루프 전류 제어기 설계)

  • Kwon, Il-Seob;Baek, Seung-Woo;Kim, Hag-Wone;Cho, Kwan-Yual
    • The Transactions of the Korean Institute of Power Electronics
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    • v.25 no.4
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    • pp.293-302
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    • 2020
  • This study proposes a triple-loop current control method for the auxiliary power unit of fuel cell trains. The auxiliary power unit of fuel cell trains has a grid-connected function when power is supplied to the utility grid. Moreover, the auxiliary power unit of trains has a 1500 V DC link voltage; thus, PWM frequency cannot be increased to a high frequency. Owing to this low PWM frequency condition, creating a triple-loop design is difficult. In this study, a triple-loop controller is developed for a capacitor voltage controller in standalone mode that operates as an auxiliary power supply for trains and for a grid current controller in grid control mode with an inner capacitor voltage controller. The voltage controller employs an inductor current controller inner loop. To overcome low PWM frequency, a design method for the bandwidth of the capacitor voltage controller considering the bandwidth of the inner inductor current controller is described. The effectiveness of the proposed method is proven using PSIM simulation.

Hierarchical Voltage Regulation of a DFIG-based Wind Power Plant Using a Reactive Current Injection Loop with the Maximum Voltage Dip for a Grid Fault (최대 전압 강하에 비례하는 무효전류 공급 루프를 이용한 DFIG 풍력단지의 계층전압제어)

  • Park, Geon;Kim, Jinho;Kang, Yong Cheol
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.65 no.8
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    • pp.1334-1339
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    • 2016
  • In a power grid that has a high wind power penetration, the fast voltage support of a wind power plant (WPP) during the grid fault is required to stabilize the grid voltage. This paper proposes a voltage control scheme of a doubly-fed induction generator (DFIG)-based WPP that can promptly support the voltage of the point of common coupling (PCC) of a WPP during the grid fault. In the proposed scheme, the WPP and DFIG controllers operate in a voltage control mode. The DFIG controller employs two control loops: a maximum voltage dip-dependent reactive current injection loop and a reactive power to voltage loop. The former injects the reactive power in proportion to the maximum voltage dip; the latter injects the reactive power in proportion to the available reactive power capability of a DFIG. The former improves the performance of the conventional voltage control scheme, which uses the latter only, by increasing the reactive power as a function of the maximum voltage dip. The performance of the proposed scheme was investigated for a 100-MW WPP consisting of 20 units of a 5-MW DFIG under various grid fault scenarios using an EMTP-RV simulator. The simulation results indicate that the proposed scheme promptly supports the PCC voltage during the fault under various fault conditions by increasing the reactive current with the maximum voltage dip.