• Title/Summary/Keyword: 전력 소모 분석

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A Load Emulator for Low-power Embedded Systems and Its Application (저전력 내장형 시스템을 위한 부하의 전력 소모 에뮬레이션 시스템과 응용)

  • Kim, Kwan-Ho;Chang, Nae-Hyuck
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.42 no.6
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    • pp.37-48
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    • 2005
  • The efficiency of power supply circuits such as DC-DC converters and batteries varies on the trend of the power consumption because their efficiencies are not fixed. To analyze the efficiency of power supply circuits, we need the temporal behavior of the power consumption of the loads, which is dependent on the activity factors of the devices during the operation. Since it is not easy to model every detail of those factors, one of the most accurate power consumption analyses of power supply circuits is measurement of a real system, which is expensive and time consuming. In this paper, we introduce an active load emulator for embedded systems which is capable of power measurement, logging, replaying and synthesis. We adopt a pattern recognition technique for data compression in that long-term behaviors of power consumption consist of numbers of repetitions of short-term behaviors, and the number of short-term behaviors is generally limited to a small number. We also devise a heterogeneous structure of active load elements so that low-speed, high-current active load elements and high-speed, low-current active load elements may emulate large amount and fast changing power consumption of digital systems. For the performance evaluation of our load emulator, we demonstrate power measurement and emulation of a hard drive. As an application of our load emulator, it is used for the analysis of a DC-DC converter efficiency and for the verification of a low-power frequency scaling policy for a real-time task.

A Survey on Time Synchronization Protocols for Wireless Sensor Networks (무선 센서 네트워크용 시각 동기화 프로토콜의 고찰)

  • Bae, Shi-Kyu
    • Journal of the Korea Society of Computer and Information
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    • v.19 no.6
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    • pp.61-69
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    • 2014
  • Various Time Synchronization protocols considering for the characteristics of WSN(Wireless Sensor Network) have been developed, because a time relationship plays an important role in many WSN applications, as well. Synchronization accuracy as well as constraints of energy should be considered for WSN Time Synchronization protocols, especially. In this paper, I analyze Time Synchronization protocols for WSN after classifying these protocols with a new criteria (i.e. power consumption). So, this method will contribute to evaluating and comparing WSN Time Synchronization protocols in respect of power consumption.

Performance Analysis of Low Power Paging Scheme using user's Property (사용자의 개별적 특성을 활용한 저전력 페이징 방안의 제안 및 분석)

  • Jeong, Ji-Won;Kim, Jeong-Ho
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.47 no.5
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    • pp.1-8
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    • 2010
  • Recently subscribers in mobile communication services increase gradually, and the new multifunctional portable terminals can provide various functionalities. However this trend may not be desirable in Green IT respect because the emission of carbon dioxides emitted during operations of base station and mobile stations can cause significant effect on the emissions of carbon dioxides. In this paper the power saving scheme which can adjust slot index while the system is in a paging phase has been proposed and its performance has been evaluated. The slot cycle index can be adjusted according to individual user's property, its effect on the system performance has been investigated. In order to mitigate its adverse effect, power ramping scheme is considered and evaluated thereafter.

Low Power Consumption Technology for Streaming Data Playback in the IPTV Set-top Box (IPTV 셋톱박스 환경에서 스트리밍 데이터 재생을 위한 전력 소모 감소 기법)

  • Go, Young-Wook;Yang, Jun-Sik;Kim, Deok-Hwan
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.47 no.1
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    • pp.30-40
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    • 2010
  • The hard disk is one of the most frequently used storage in IPTV sep-top box. It has large storage capacity and provides fast I/O speed compared to its price whereas it causes high power consumption due to mechanical characteristics of spindle motor. In order to play streaming data in the set-top box, spindle motor of hard disk keeps active mode and it causes high power consumption. In this paper, We propose an offset-buffering and multi-mode spin-down method to reduce power consumption for streaming data playback. The offset-buffering inspects the user's viewing pattern and performs buffering based on the analysis of viewing pattern. So, it can maintain the status of spindle motor as idle mode for long time. Besides, it can reduce power consumption by spinning down according to offset-buffer size. The experimental result shows that proposed offset-buffering and multi mode spin-down method is about 28.3% and 12.5% lower than the full-Buffering method in terms of the power consumption and spin-down frequency, respectively.

A Study for Low Power Consumption in the Stand-by of Asymmetrical Half-Bridge Converter (Asymmetrical half-bridge converter에서 무부하시 전력소모 감소에 관한 연구)

  • Ha, Seok-Jin;Soung, Euii-Ho;Kim, Jong-Hyun;Kim, Jong-Soo
    • Proceedings of the KIPE Conference
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    • 2005.07a
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    • pp.128-130
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    • 2005
  • 본 논문은 ZVS asymmetrical half-bridge converter 에서 무부하시 전력소모 분석과 감소 방안에 대한 연구이다. Asymmetrical half-bridge converter는 영전압 스위칭을 통해 효율 증가가 가능하고, 낮은 EMI 발생의 장점으로 인해 최근 많이 사용되고 있다. 그러나 최근 이슈가 되고 있는 대기전력 소모의 관점에서는 기존의 hard switching converter에 비해 오히려 손실이 증가한다. 이는 공진형 컨버터의 무부하시 동작이 기생전류에 의한 도통손실이 크기 때문이다. 따라서 본 논문에서는 이를 개선 할 수 있는 방법을 제시하고 70W급의 실험용 SMPS의 제작을 통해 제안된 방법의 타당성을 검증한다.

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Power Efficient Handover Algorithm for DVB-H System (DVB-H시스템을 위한 전력 효율적인 핸드오버 알고리즘)

  • Park Hyung-Kun;Cho Jae-Soo
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.9
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    • pp.1679-1684
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    • 2006
  • DVB-H(Digital Video Broadcasting for Handhold) is a new standard, currently being developed, which defines mobile enhancements for the DVB-T (DVB-Terrestrial) standard. For the reception of service via mobile handheld devices, seamless mobility and power saving are essential requirements of DVB-H. For seamless handover, the receiver should monitor neighboring cells and it increases the power consumption. And so, power efficient handover scheme to support both mobility and power saving is required. In this paper, we propose power efficient handover scheme to reduce power consumption by reducing the number of frequency scanning during the handover. Through the numerical evaluation, we analyze the performance of handover schemes.

Cryptanalysis of the Randomized Signed-Scalar Multiplication (랜덤 부호화 스칼라 곱 알고리즘 분석)

  • 한동국;김태현;장상운;박영호
    • Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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    • 2003.07a
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    • pp.83-88
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    • 2003
  • 부채널 공격(side channel attack)을 막는 새로운 접근방법으로 생각되는 랜덤 부호화 스칼라 곱 알고리즘은 Ha와 Moon에 의해서 제안되었다. 그러나 이 방법은 여전히 논쟁의 여지가 있다. 본 논문에서는 Ha-Moon 알고리즘이 기존의 세 가지 단순 전력 소모량 분석(simple power analysis, SPA)에 안전함을 보인다. 그리고 정수론의 성질을 이용하여 두 가지 중요한 정리를 제시하고 이 정리들을 이용하여 Ha-Moon 알고리즘에 적용할 수 있는 공격 알고리즘을 개발한다. 예를 들면, 163-비트 키들에 대하여 제안 알고리즘은 20개의 전력 소모량을 이용하여 키 복잡도 Ο(2$^{8}$ )를 가지고 공격할 수 있다.

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Dynamic period of GPS searching using pattern analysis of moving trajectory (사용자 이동 경로 패턴 분석을 통한 동적 GPS 신호 검색 주기 변경 기법)

  • Kwon, Minan;Oh, Jehwan;Lee, Eunseok
    • Proceedings of the Korea Information Processing Society Conference
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    • 2009.11a
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    • pp.897-898
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    • 2009
  • 본 논문은 사용자의 일상적인 이동 경로 패턴을 분석하여 일상화 지수를 측정하고, 이를 통해 GPS 신호 검색 주기를 동적으로 변경하는 동적 GPS 신호 검색 주기 변경 시스템을 제안한다. 고정된 GPS 신호 검색 주기는 불필요하게 많은 전력을 소모하기 때문에 제안 시스템을 이용하여 이동 단말기의 전력 소모 문제를 개선할 수 있다.

High Performance Dual-Modulus Prescaler with Low Power D-flipflops (저전력 D-flipflop을 이용한 고성능 Dual-Modulus Prescaler)

  • 민경철
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.10A
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    • pp.1582-1589
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    • 2000
  • A dynamic D-flipflop is proposed aiming at low power and high frequency(GHz) operations. The proposed D-flipflop uses a smaller number of pmos transistors that it operates high speed in same dimensions. Also, it consumes lower power than conventional approaches by a shared nmos with clock input. In order to compare the performance of the proposed D-flipflop, we perform simulation estimating power consumption and maximum operating frequency of each same dimension D-flipflop. A high speed dual-modulus prescaler employing the proposed D-flipflop. A high speed dual-modulus prescaler employing the proposed D-flipflop. A high speed dual-modulus prescaler employing the proposed D-flipflop is evaluated via the same method. The simulation results show that the proposed D-fliplflop has good performance than conventional circuits.

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Experimental Analysis of MESD Attack on Smartcard. (스마트카드의 MESD 공격에 대한 실험적 분석)

  • 안만기;이훈재;하재철;김동렬;문상재
    • Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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    • 2002.11a
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    • pp.575-579
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    • 2002
  • 스마트카드는 내부의 암호 알고리듬이 수행될 때, 비밀키와 관련된 여러 가지 물리적인 정보가 누출될 가능성이 있다. 이러한 물리적 정보 중에서 소비되는 전력을 측정하고 분석하는 차분 전력분석 공격은 매우 강력한 방법이다. 본 논문에서는 시차공격과 단순전력분석 공격에 대응하는 몽고메리 멱승 알고리듬과 스칼라 상수배 알고리듬이 구현된 스마트카드에서 차분 전력 분석 공격의 방법 중에서 동일한 메시지를 이용하는 MESD 공격을 실험하고 실험과정에서 소모전력의 측정 개수와 표본화율 그리고 잡음의 관계를 분석한다.

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