• Journal of Internet of Things and Convergence
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• v.8 no.4
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• pp.9-15
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• 2022

NAND flash memory is used as a medium for various storage devices due to its high data processing speed with low power consumption. However, since the read processing speed of data is about 10 times faster than the write processing speed, various studies are being conducted to improve the speed difference. In particular, flash dedicated buffer management policies have been studied to improve write speed. However, SSD(solid state disks), which has recently been used for various purposes, is more vulnerable to read performance than write performance. In this paper, we find out why read performance is slower than write performance in SSD composed of NAND flash memory and study buffer management policies to improve it. The buffer management policy proposed in this paper proposes a method of improving the speed of a flash-based storage device by analyzing the pattern of read data and applying a policy of pre-reading data to be requested in the future from NAND flash memory. It also proves the effectiveness of the read-ahead policy through simulation.

• Journal of Korea Society of Industrial Information Systems
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• v.15 no.1
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• pp.1-14
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• 2010

It is recently issued scalability, mobility and external internet connection on Wire-less sensor network. The low power wireless sensor networks based on IPv6 technology 6LoWPAN technology is being standardized in the IETF. This paper for the 6LoWPAN environment based on the routing protocol LOAD, route cost applied the packet re-transmission rate which follows in Link Qualities price which uses at course expense and packet transmission Minimum route Cost routing protocol where does on the course wherethe smallest packet re-transmission becomes accomplished proposed. The technique which proposes compared and LOAD and AODV that about 13%, about 16% energy consumption is few respectively averagely, Energy of the entire network equally, used and energy effectiveness and improvement of network life time experiment led and confirmed.

• The Journal of the Korea institute of electronic communication sciences
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• v.18 no.4
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• pp.617-624
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• 2023

Recently, miniaturization and low power consumption of electronic products and improved efficiency and power factor improvement have become a matter of great interest. In this paper, an AC-DC converter based on PWM control was designed and made. The AC-DC converter is designed with a structure in which one rectifier circuit and one output voltage control circuit are connected in series. The rectifier circuit is a diode-based single phase full-wave current circuit and the output voltage control circuit is a DC-DC conversion circuit based on PWM control. Arduino was used as the main control device for PWM control, and LCD was configured at the output stage so that the control result could be checked. The error between the output voltage displayed on the oscilloscope and LCD and the target output voltage was confirmed through repeated experiments with the test circuit, and the validity of the proposed design methodology was confirmed by showing an error rate of about 5% based on the oscilloscope measurement value.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.19 no.1
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• pp.105-112
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• 2018

This paper proposes a method for fabricating heatable glass using the conduction characteristics of metal thin films deposited on the surface of Low-e(Low emissivity) glass. The heating value of Low-e glass depends on the Joule heat caused by Low-e glass sheet resistance. Hence, its prediction and design are possible by measuring the sheet resistance of the material. In this study, silver electrodes were placed at 50 mm intervals on a soft Low-e glass sample with a low emissivity layer of 11 nm. This study measured the sheet resistance using a 4-point probe, predicted the power consumption and heating value of the Low-e glass, and confirmed the heating performance through fabrication and experience. There are two conventional methods for manufacturing heatable glass. One is a method of inserting nichrome heating wire into normal glass, and the other is a method of depositing a conductive transparent thin film on normal glass. The method of inserting nichrome heating wire is excellent in terms of the heating performance, but it damages the transparency of the glass. The method for depositing a conductive transparent thin film is good in terms of transparency, but its practicality is low because of its complicated process. This paper proposes a method for manufacturing heatable glass with the desired heating performance using Low-e glass, which is used mainly to improve the insulation performance of a building. That is by emitting a laser beam to the conductive metal film coated on the entire surface of the Low-e glass. The proposed method is superior in terms of transparency to the conventional method of inserting nichrome heating wire, and the manufacturing process is simpler than the method of depositing a conductive transparent thin film. In addition, the heat characteristics were compared according to the patterning of the surface thin film of the Low-e glass by an emitting laser and the laser output conditions suitable for Low-e glass.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.19 no.4
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• pp.650-656
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• 2018

The TFT-LCD industry is a kind of large-scale industrial Giant Microelectronics device industry and has a similar semiconductor process technology. Wet etching forms a relatively large proportion of the entire TFT process, but the number of published research papers on this topic is limited. The main reason for this is that the components of the etchant, in which the reaction takes place, are confidential and rarely publicized. Aluminum (Al) and copper (Cu), which have been used in recent years for the manufacture of large area LCDs, are very difficult materials to process using wet etching. Cu, a low-resistance material, can only be used in the wet etching process, and is used as a substitute for Al due to its high speed etching, low failure rate, and low power consumption. Further, the abnormal reaction of hydrogen peroxide ($H_2O_2$), which is used as an etching solution, requires additional piping and electrical safety devices. This paper proposes a method of minimizing the damage to the plant in the case of adverse reactions, though it cannot limit the adverse reaction of hydrogen peroxide. In recent years, there have been many cases in which aluminum etching equipment has been changed to copper. This paper presents a countermeasure against abnormal reactions by implementing safety PLC with a high safety grade.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.12
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• pp.80-87
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• 2013

A novel instrumentation amplifier(IA) using positive polarity current-conveyor(CCII+) for electronic measurement systems with low cost, wideband, and gain control with wide range is designed. The IA consists of two CCII+, three resistor, and an operational amplifier(op-amp). The principal of the operating is that the difference of two input voltages applied into two CCII+ used voltage and current follower converts into same currents, and then these current drive resistor of (+) terminal and feedback resistor of op-amp to obtain output voltage. To verify operating principal of the IA, we designed the CCII+ and used commercial op-amp LF356. Simulation results show that voltage follower used CCII+ has offset voltage of 0.21mV at linear range of ${\pm}$4V. The IA had wide gain range from -20dB to 60dB by variation of only one resistor and -3dB frequency for the gain of 60dB was 400kHz. The IA also has merits without matching of external resistor and controllable offset voltage using the other resistor. The power dissipation of the IA is 130mW at supply voltage of ${\pm}$5V.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.1
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• pp.59-67
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• 2016

A novel instrumentation amplifier (IA) using fully-differential linear operational transconductance amplifier (FLOTA) for electronic measurement systems with low cost, wideband, and gain control with wide range is designed. The IA consists of a FLOTA, two resistor, and an operational amplifier(op-amp). The principal of the operating is that the difference of two input voltages applied into FLOTA converts into two same difference currents, and then these current drive resistor of (+) terminal and feedback resistor of op-amp to obtain output voltage. To verify operating principal of the IA, we designed the FLOTA and realized the IA used commercial op-amp LF356. Simulation results show that the FLOTA has linearity error of 0.1% and offset current of 2.1uA at input dynamic range ${\pm}3.0V$. The IA had wide gain range from -20dB to 60dB by variation of only one resistor and -3dB frequency for the 60dB was 10MHz. The proposed IA also has merits without matching of external resistor and controllable offset voltage using the other resistor. The power dissipation of the IA is 105mW at supply voltage of ${\pm}5V$.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.4A
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• pp.352-360
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• 2008

Recently Task Group (TG) 4 of the Institute of Electrical and Electronics Engineers (IEEE) 802.15a has been recommended a system with ranging capability in existence of multiple Simultaneous operating piconets (SOPs) as well as low-cost, low-power. According to the ranging service, coherent and non-coherent based ranging schemes using ternary code have been adopted as a standard. However it is hard to estimate an accurate time of arrival (TOA) in case of using direct sequence based TOA estimation method because pulse repetition interval (PRI) offered by TG is more limited than the maximum excess delay (MED) of channel. To mitigate inter pulse interference (IPI) problem, this paper proposes a non-coherent TOA estimation scheme using non-periodic transmission (NPT) pattern. The proposed receiver is based on a non-coherent energy detection considering with motivation of low rate wireless personal area network (LR-WPAN). TOA information is estimated via proper comparison with a prescribed threshold after the sliding correlation and search back window (SBW) process for reducing TOA error. To verify the performance of proposed ranging scheme, two distinct channel models approved by IEEE 802.15.4a TG are considered. According to the simulation results, we could conclude that the proposed scheme have performed better performance than the conventional method on the existence of multiple SOPs.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.1
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• pp.36-44
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• 2007

This paper presented a hybrid ternary encoding scheme using 3-valued logic. It can adapt to the delay-insensitive(DI) model. We designed an asynchronous wrapper for the hybrid ternary encoding scheme to communicate with various asynchronous encoding schemes. It reduced about 50% of transmission lines and power consumption compared with the conventional 1-of-4 and ternary encoding scheme. The proposed wrappers were designed and simulated using the $0.18-{\mu}m$ standard CMOS technology. As a result, the asynchronous wrapper operated over 2 GHz communicating with a system bus. Moreover, the power dissipation of the system bus adapted the hybrid ternary encoding logic decreases 65%, 43%, and 36% of the dual-rail, 1-of-4, and ternary encoding scheme, respectively. The proposed data encoding scheme and the wrapper circuit can be useful for asynchronous high-speed and low-power asynchronous interface.

• The Journal of the Korea Contents Association
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• v.10 no.2
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• pp.72-80
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• 2010

The 1Gbps clock and data recovery (CDR) circuit using the proposed multi-point phase detector (PD) is presented. The proposed phase detector generates up/down signals comparing 3-point that is data transition point and clock rising/falling edge. The conventional PD uses the pulse width modulation (PWM) that controls the voltage controlled oscillator (VCO) using the width of a pulse period's multiple. However, the proposed PD uses the pulse number modulation (PNM) that regulates the VCO with the number of half clock cycle pulse. Therefore the proposed PD can controls VCO preciously and reduces the jitter. The CDR circuit is tested using 1Gbps $2^{31}-1$ pseudo random bit sequence (PRBS) input data. The designed CDR circuit shows that is capable of recovering clock and data at rates of 1Gbps. The recovered clock jitter is 7.36ps at 1GHz and the total power consumption is about 12mW. The proposed circuit is implemented using a 0.18um CMOS process under 1.8V supply.