• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.29 no.4A
• /
• pp.439-446
• /
• 2004

This paper describes high speed and low power design techniques for an 8-bit 500MSamples/s CMOS 2-step ADC. Instead of the conventional closed-loop architecture, the newly proposed ADC adopts open-loop architecture and uses a reset-switch to reduce loading time in an environment of big parasitic-capacitances of mux-array. An analog-latch is also used to reduce power consumption. Simulation result shows that the ADC has the SNDR of 46.91㏈ with a input frequency of 103MHz at 500Msample/s and consumes 203㎽ with a 1.8V single power supply. The chip is designed with a 0.18mm 1-poly 6-metal CMOS technology and occupies active area of 760${\mu}{\textrm}{m}$*800${\mu}{\textrm}{m}$.

• Journal of KIISE:Software and Applications
• /
• v.36 no.5
• /
• pp.376-385
• /
• 2009

Increasing the importance of Green IT brings low-power consumption requirements for embedded software into relief. This paper focus on the power analysis techniques of embedded software along with the trend. We survey the existing research on the power analysis techniques performed during the last decade, and find out some features or characteristics from the analysis approaches of those techniques. Also we summarize those characteristics into a systematic model, and then apply the model to embedded software development process using spider diagram. Our suggestion gives such benefits as improving the understanding of power analysis techniques, guiding the choice of an appropriate technique to their Power analysis, and forecasting the direction of technology changes in embedded software power analysis.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2015.10a
• /
• pp.1002-1005
• /
• 2015

Mobile operating systems have been typically classified into Apple and Android. Samsung showed its own new mobile OS developing Tizen based on Linux kernel. Mobile operating system has developed a technology using low-power by itself because of the limitation of capacity of battery, a feature of mobile. Samsung Tizen OS has a low-power technology called Power Manager controling LCD states as users'inputs or time-out events occur. However, if users'input occurs frequently, energy consumption jumped before-and-after users'input because CPU clock is increased rapidly due to overhead increase for frequent LCD state changes. This paper proposes a mechanism to reduce the overhead for LCD state changes, when user's input is frequent, by adding a new state to the Power Manager the current Tizen OS is using. We have implemented the proposed mechanism at Tizen phone kernel layer in this paper and experimented the mechanism according to users' LCD touch inputs. The experiment shows that it is possible to decrease energy by reducing the CPU clock increase according to the frequent user's inputs.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.52 no.7
• /
• pp.100-106
• /
• 2015

In this paper, we propose a fast algorithm for low-power image enhancement method for mobile LCD. In the proposed fast algorithm, the spatial resolution of the input image is significantly reduced, and the image characteristics are analyzed on the reduced resolution image to find a dimming rate adaptive to the image content, thereby saving power. The proposed fast adaptive dimming and image enhancement algorithm is implemented as an application that runs on an Android device. Image quality evaluation and running time analysis experiments on the device indicate that the proposed fast algorithm jointly minimizes the quality degradation and power consumption, reducing the required computation load by over 95%.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.16 no.12
• /
• pp.2731-2740
• /
• 2012

ASIC(application specific integrated circuit) process is a set of various technologies for fabricating a chip. Generally there have been many researches for RTL design, synthesis, floor plan & routing, low power scheme, clock tree synthesis, and testability which are widely researched in recent. In this paper we propose a new methodology of power strap routing in basis of design experience and experiment. First the power strap for vertical VDD and VSS and horizontal VDD and VSS is routed, and then after the problems which are generated in this process are analyzed, we propose a new process for resolving them. For this, the strap guide is inserted to protect the unnecessary strap routing and dumped for next steps. Next the unnecessary power straps which are generated the first inserting process are removed, and the pre-routing is performed for the macro cells. Finally the resultant power straps are routed using the dumped routing guide. Through the proposed process we identified the efficient and stable route of the power straps.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.44 no.1
• /
• pp.59-67
• /
• 2007

This paper presents a low power dual-level low voltage differential signaling (DLVDS) technique using current source switching for LCD driver ICs in portable products. The transmitter makes dual level signal that has two different level signal 400mVpp and 250mVpp while keeping the advantages of LVDS. The decoding circuit recovers the primary signal from DLVDS. The low power DLVDS is implemented using a $0.25{\mu}m$ CMOS process under 2.5V supply. The proposed circuit shows 800Mbps/2-line data rate and 9mW, 11.5mW power consumptions in transmitter and receiver, respectively. The proposed DLVDS scheme reduce power consumption dramatically compare with conventional one.

• Proceedings of the KIPE Conference
• /
• 1999.07a
• /
• pp.452-455
• /
• 1999

일반적인 전동기부하는 저속에서 큰 토크를 필요로 하지 않으므로, 인버터로 전동기를 구동하고자 할 때는 낮은 평균전압이 필요하다. 그러나 전력전자 소자의 제한된 스위칭 주파수, 단락 방지를 위한 데드타임 그리고 스위치나 다이오드 도통전압 등으로 인하여, 전류제어 루프 내에는 비선형성이 존재한다. 이러한 비선형성은 디지털 방식의 PWM에서 저전압을 합성할 때 현저하게 나타나는데 결과적으로 교류전동기의 저속운전을 어렵게 한다. 본 논문에서는 기존 디지털방식 PWM의 비선형성을 모델링 하고 그 비선형성을 감소시킬 수 있는 공간벡터 변조기법을 제시하였다.

• Proceedings of the KIPE Conference
• /
• 2011.07a
• /
• pp.3-4
• /
• 2011

본 논문은 저전압 대전류의 신재생 에너지원을 고전압 저전류 계통에 연계하기 위하여 제안되었던 기존의 출력 직력형 고승압 직류-직류 포워드 플라이백 컨버터에 소프트 스위칭 기법을 적용하여 효율을 향상시킨 전력변환기 회로를 제안한다. 제안된 컨버터는 기존의 하드 스위칭 방식에 비하여 고승압, 고주파 스위칭 동작에도 불구하고 효율이 우수한 장점을 지니고 있다. 소프트 스위칭을 유지하기 위하여 스위칭 주파수는 가변되는 특징이 있다. 제안된 회로의 동작원리를 설명하고 시뮬레이션으로 확인한 후 50[W]급 하드웨어 프로토 타입을 이용하여 검증하였다.

• Proceedings of the Korean Information Science Society Conference
• /
• 2004.04a
• /
• pp.127-129
• /
• 2004

모바일 컴퓨팅 장비에서 전송 데이터를 압축해 송수신하는 데이터의 양을 줄임으로써 궁극적으로는 통신에 사용되는 전력 소모를 줄일 수 있다. 본 논문에서는 이 기법을 활용하여 한글 데이터를 에너지 효율적으로 전송하는 기법을 제안한다. 제안하는 알고리즘은 한글의 표기 단위인 2 바이트 단위로 데이터를 압축하며 한글의 표기상의 특성을 활용하는 장점이 있다. 실험 결과 제안하는 알고리즘은 다양한 한글 데이터에 대해서 평균적으로 압축 효율을 약 5% 가량 증가시킨다. 이와 함께 제안하는 알고리즘은 실행 시에 사용하는 에너지가 비교적 적어 기존 알고리즘에 비해 한글을 보다 에너지 효율적인 방식으로 압축해 전송함으로써 모바일 장비의 소모 전력 측면의 효율을 증가시킬 수 있다.

• Proceedings of the Korea Information Processing Society Conference
• /
• 2014.04a
• /
• pp.928-931
• /
• 2014

사용자와의 인터페이스가 많은 모바일 기기에서 TFT LCD는 현재 가장 많이 사용되는 디스플레이로 백라이트(backlight)로 인한 전력 소모가 많아 배터리 수명이 짧아지는 것이 큰 문제이다. 전력 절감을 위해 사용되는 backlight dimming 기법은 명암비 조정에 따른 이미지 왜곡의 보완 기법과 함께 많은 연구가 진행되고 있다. 본 논문에서는 PWM 구동에 의한 LED backlight 제어가 가능한 TFT LCD 보드 구현을 소개하고 이 보드를 대상으로 framebuffer와 LED 제어용 리눅스 장치 드라이버를 사용한 객체 기반의 저전력 인간 시각 만족의 화질 보상 dimming 알고리즘의 구현 연구 내용을 기술한다.