• Title/Summary/Keyword: 저잡음증폭기

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A study on the design of voltage controlled Amplifier using only OTA (OTA 만을 이용한 전압제어 증폭기의 설계)

  • 이영훈
    • Journal of the Korea Society of Computer and Information
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    • v.6 no.4
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    • pp.125-130
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    • 2001
  • The application of the operational trasconductance amplifier (OTA) in the design of a amplifier with voltage-controlled gam is demonstrated first. I designed OTA with linear operation and constructed a Amplifier with two OTA. In this design. I used OTA as open loop. Computer simulation result, designed OTA and Amplifier charateristics has a good matching with the theoritical value. The OTA is used often in open-loop and therefore it is wise to learn how to treat the two input pins independently, as a vertual short circuit can not be assured in many configurations.

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Design of MMIC Low Noise Amplifier for B-WLL using GaAs PHEMT (GaAs PHEMT를 이용한 B-WLL용 MMIC 저잡음 증폭기의 설계)

  • 김성찬;이응호;조희철;조승기;김용호;이진구
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.11 no.1
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    • pp.102-109
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    • 2000
  • In this paper, a Low Noise Amplifier for B-WLL was designed using the MMIC technology with GaAs PHEMTs fabricated at our lab. The PHEMT for LNA has a $0.35\mu\textrm{m}$ gate and a total gate width of $120\mu\textrm{m}$. The designed MMIC LNA consists of three stages. The first stage of the LNA has a series inductive feedback for obtaining minimum noise and high stability as well. And the designed MMIC LNA has not an interstage matching circuit between the second and the third stage for minimization of the chip size. From simulation results, noise figure and S21 gain of the designed MMIC LNA are 0.85~1.25 dB and 22.08~23.65 dB in the frequency range of 25.5~27.5 GHz respectively. And the chip size is $3.7\times1.6 mm^2$.

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A Novel Hybrid Balun Circuit for 2.4 GHz Low-Power Fully-differential CMOS RF Direct Conversion Receiver (2.4 GHz 저전력 차동 직접 변환 CMOS RF 수신기를 위한 새로운 하이브리드 발룬 회로)

  • Chang, Shin-Il;Park, Ju-Bong;Shin, Hyun-Chol
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.4
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    • pp.86-93
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    • 2008
  • A low-power, low-noise, highly-linear hybrid balun circuit is proposed for 2.4-GHz fully differential CMOS direct conversion receivers. The hybrid balun is composed of a passive transformer and loss-compensating auxiliary amplifiers. Design issues regarding the optimal signal splitting and coupling between the transformer and compensating amplifiers are discussed. Implemented in $0.18{\mu}m$ CMOS process, the 2.4 GHz hybrid balun achieves 2.8 dB higher gain and 1.9 dB lower noise figure than its passive counterpart and +23 dBm of IIP3 only at a current consumption of 0.67 mA from 1.2 V supply. It is also examined that the hybrid balun can remarkably lower the total noise figure of a 2.4 GHz fully differential RF receiver only at a cost of 0.82 mW additional power dissipation.

Design of Low-Power Hybrid LNA with Multi-Input for Mobile Ultrasound System (이동형 초음파시스템에 적합한 다중 입력방식의 저전력 혼성 저잡음 증폭기 설계)

  • Song, Jae-Yeol;Lee, Kyung-Hoon;Park, Sung-Mo
    • Journal of the Institute of Convergence Signal Processing
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    • v.15 no.2
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    • pp.64-69
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    • 2014
  • Ultrasound system is one of the complex wireless signal processing systems that are widely used in the fields of modern industry such as medical diagnostics, underwater communications, and sensor-networks. Miniaturization of ultrasound system has been raging recently. In this paper, a hybrid LNA that is suitable for miniaturization and mobile diagnostic ultrasound system has been developed. The proposed LNA has low noise figure of less than 5dB, and the feedback resistor is designed to be electrically adjusted in order to attain the impedance-matching for various ultrasound transducers. It supports the whole ultrasound frequencies from 10KHz to 150MHz frequency band and also provides sleep modes. A gain from -18.8 to -29.5 dB is achieved by adjusting each transducer to fit the system character. Power consumption can be reduced up to 90% in similar performance as compared to the existing LNA.

Post-Linearization Technique of CMOS Cascode Low Noise Amplifier Using Dual Common Gate FETs (두 개의 공통 게이트 FET를 이용한 캐스코드형 CMOS 저잡음 증폭기의 후치 선형화 기법)

  • Huang, Guo-Chi;Kim, Tae-Sung;Kim, Seong-Kyun;Kim, Byung-Sung
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.44 no.7 s.361
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    • pp.41-46
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    • 2007
  • A novel post-linearization technique is proposed for CMOS cascode low noise amplifier (LNA). The technique uses dual common gate FETs one of which delivers the linear currents to a load and the other one sinks the $3^{rd}$ order intermodulation currents of output currents from the common source FET. Selective current branching can be implemented in $0.18{\mu}m$ CMOS process by using a thick oxide FET as an IM3 sinker with a normal FET as a linear current buffer. A differential LNA adopting this technique is designed at 2.14GHz. The measurement results show 11dBm IIP3, 15.5dB power gain and 2.85dB noise figure consuming 12.4mA from 1.8V power supply. Compared with the LNA with turning off the IM3 sinker, the proposed technique improves the IIP3 by 7.5 dB.

Design of Ultra Wide-Band CMOS Low Noise Amplifier (광대역 CMOS 저잡음 증폭기 설계)

  • Moon Jeong-Ho;Jeong Moo-Il;Kim Yu-Sin;Lee Kwang-Du;Park Sang-Gyu;Han Sang-Min;Kim Young-Hwan;Lee Chang-Seok
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.6 s.109
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    • pp.597-604
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    • 2006
  • An ultrawideband(UWB) $3.1{\sim}5.15$ GHz low-noise amplifier employing a novel input matching circuit and feedback topology are presented. The proposed UWB amplifier is Implemented in $0.18{\mu}m$ RF CMOS technology. Measurements show a NF of $3.4{\sim}3.9$ dB, a power gain of $12.8{\sim}14$ dB, better than -9.4 of input matching and, an input IP3 of -1 dBm, while comsuming only 14.5 mW of power.

Design of Temperature-Compensation Circuits of Ku-band Amplifiers for Satellite Payload (위성중계기용 Ku-대역 증폭기의 온도보상회로 설계)

  • 장병준;염인복;이성팔
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.13 no.10
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    • pp.1025-1033
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    • 2002
  • This paper presents temperature-compensation circuits of Ku-band amplifiers for satellite payload. After carefully investigating design specifications of Ku-band amplifiers for satellite payload, we designed three types or temperature-compensation circuits, which are an active bias circuit, an attenuator control, and an ALC loop circuit. Our design technique demonstrates good agreement between measured and predicted results. These temperature-compensation circuits are suitable for Ku-band satellite payload active components, such as channel amplifiers, LNA and IF amplifiers.

An Ultra Low Cost, Dual-band VCO Design at GSM/DCN (저 비용 듀얼 대역 전압 제어 발진기 설계)

  • 오태성;이영훈
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2001.11a
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    • pp.235-238
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    • 2001
  • 단일 단말기로부터 멀티 통신이 가능하게 됨에 따라 광대역 또는 듀얼대역에서 사용되는 RF 소자 개발이 중요시되고 있다. 그러므로 소형, 저 비용의 멀티대역 VCO(Voltage Controlled Oscillator)개발이 요구된다. 본 논문에서 GSM/DCN 대역에서 사용 가능한 듀얼밴드 VCO을 설계하였다. 하나의 발진부, 듀얼 공진부, 완충증폭기, 스위치회로로 구성되었으며, 위상 보정 기법을 이용하여 각 밴드에 대한 발진 조건을 만족시키므로 사용 부품의 수를 줄일 수 있어 저 비용, 소형화, 낮은 위상잡음(phase noise)을 얻을 수 있다. 설계된 듀얼 VCO는 GSM 대역에서 -110dBc/Hz(100kHz offset) 이하의 위상 잡음과 DCN 대역에서 -108dBc/Hz(100kHz offset)의 위상 특성을 보인다. 출력전력은 0$\pm$3dBm이며 소비전력 7mA로 만족할만한 성능을 보인다.

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