• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.14 no.4
• /
• pp.401-412
• /
• 2003

In this paper, a broadband phase shifter structure using a new switched network was proposed. A new reference network is composed of coupled lines and 45$^{\circ}$open and short stubs, which are shunted at the edge points of a main line, respectively, A delay network is composed of only a standard transmission line. It is possible to design a broadband 180$^{\circ}$phase shifter that phase dispersive characteristics by an impedance ratio R of coupled lines and greater phase dispersive characteristics by characteristic impedances Zm, Zs of a main line and stubs are used together. By considering a structure symmetry, the even and odd mode analysis was performed to obtain theoretical S-parameters of the proposed phase shifter. Also, through computer simulation on the basis of derived equations, design graphs were presented to optimally design a 180$^{\circ}$broadband phase shifter. Design graphs provide the values of characteristic impedances Zm, Zs, and I/O match and phase bandwidths. To verify electrical performances of the broadband phase shifter proposed in this paper, low different 180$^{\circ}$phase shifters, operated at the center frequency 3 GHz were designed and fabricated using design graphs, and were experimented. One of them was designed as a standard Schiffman structure to compare with electrical performances. Measured results of each phase shifter to satisfy simultaneously design conditions of I/O match （VSWR=1.15:1) and maximum phase deviation $({\varepsilon}_{{\Delta}{\phi}}＝{\pm}2^{\circ})$ were well in agreement with corresponding simulation results over impedance match and phase error bandwidths, and showed broadband characteristics.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.17 no.10 s.113
• /
• pp.929-934
• /
• 2006

In the paper, we suggest a simpler synthesis technique for capacitively-coupled match circuit(CCMC) which have a function of DC block and impedance matching simultaneously, and introduce a stability margin analysis technique for designing microwave amplifier under conditionally stable state. Stability margin analysis is used to determine optimum match point that ensure maximum gain under the given stability margin. It can reduce time consuming work for selecting match points in the conditionally stable state. Also, suggested miniaturization scheme of matching network is distinguished from previous work with respect to reducing deterministic parameters for CCMC synthesis. To verify utility of suggested method, 24 GHz gain block is fabricated under conditionally stable state using an internal thin-film fabrication process, Measured results show a stable gain of 10 dB and flatness of 1 dB, which is well coincident with simulated one.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.27 no.12
• /
• pp.1112-1115
• /
• 2016

Global Positioning System(GPS) is a useful system used in both civilian and military applications. However, the signal of GPS is susceptible to jamming attacks due to low receive sensitivity, since the signals come from the satellite located at over 20,000 km above the earth. In this paper, we have conducted a preceding research on a non-Foster matching circuit that efficiently matches an electrically ultra-small GPS antenna. Electrically Small Antennas(ESAs) are inefficient radiators and are difficult to match in wideband due to extremely high quality factor. In order to match small GPS antenna in wideband, a non-Foster matching circuit for a small GPS antenna was designed. A negative impedance converter circuit consisting of Linvill's cross-coupled pair transistors was fabricated and its stability was verified by the time-domain stability analysis. In addition, anechoic chamber measurements show that the non-Foster matching circuit for small GPS antenna can lead bore-sight gain improvement by more than 17 dB.

• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
• /
• v.2 no.2
• /
• pp.3-10
• /
• 1991

The new structure method of GaAs microwave amplifiers using DC block function and impedance transforming property of DC block/transformer(non-symmetrical two - microstrip coupled line and interdigital three - microstrip coupled line), instead of chip capacitor, is presented. The newly structured microwave amplifier showed wideband characteristics(bandwidth, 3.5 GHz) and flat frequency response. Interdigital three - microstrip coupled line which is used for microwave amplifier can be used to match amplifiers as well as DC blocking.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.13 no.4
• /
• pp.323-330
• /
• 2002

In this paper, we have designed and fabricated an BWLL MMIC amplifier using GaAs PHEMT devices. We have optimized power divider/combiner size for small size of MMIC amplifier Using 0.2 ${\mu}$m AIGaAs/lnGaAs/GaAs PHEMT devices, the two stave MMIC amplifier has demonstrated a S$_{21}$ gain of 8.7 ㏈ with input/output return losses of lower than -10 ㏈ at 26.7 GHz. The size of this chip is 4.11 ${\times}$ 2.66 $\textrm{mm}^2$.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.15 no.9
• /
• pp.722-728
• /
• 1990

A comppact waveguide to microstrip transition to be used for measurements of the performances of the U-band MMIC power amplifier is designed and fabricated. A Tchebyscheff ${\lambda}$/4 impedence transformer is adopted as an impedence converter of the transition. The designed transition is optimized to get Su less then -28dB over the 40-to-48GHZ band using Supper Compact program. The measured results shows that insertion loss and return loss are typically 0.3 and 25dB respectively over 40-to-47GHz.

• Journal of Advanced Navigation Technology
• /
• v.15 no.6
• /
• pp.1008-1014
• /
• 2011

In this paper, multi-band fractal microstrip patch antenna which is possible for WLAN band and WiMax band is designed and made. For multi-resonance of developed antenna, resonance frequency, impedance matching, polarity and reflection pattern can mad perfectly, then to make satisfied multi-independent frequency three kind of half circle fractal patch is inserted. In the situation continuously happening half circle in designed structure, antennas one of half-circle band is shown.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.11 no.5
• /
• pp.81-86
• /
• 2011

In this paper, fractal microstrip patch antenna in a semicircle, by designing a multi-resonant antenna was improved by bandwidth issues, including the IEEE 802.11 wireless LAN and IEEE802.16e-band mobile WiMax specification both of which can contain non-directional antenna design and measured characteristics of the antenna for multi-resonant resonant frequency, impedance matching, radiation pattern, brilliantly polarity and multiple independent frequencies that can be controlled to meet the three semicircular wireless communications by inserting fractal patch antenna was designed.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.26 no.8B
• /
• pp.1035-1040
• /
• 2001

SNU-ISRC 0.25$\mu\textrm{m}$ pHEMT 표준 공정을 사용하여 Ka-band에서 동작하는 0.2W급 MMIC CPW 전력증폭기를 설계, 제작하였다. 기존의 MMIC 공정에서 사용되는 마이크로스트립 전송선 대신 CPW 전송선을 사용함으로써 보다 간단하고 저가의 공정이 가능하였다. 전력증폭기의 설계에서는 보다 넓은 주파수 대역에서 원하는 출력전력을 얻기 위해서 출력단을 Wilkinson coupler를 사용하였는데, 일반적으로 Wilkinson coupler에 사용되는 50Ω 특성임피던스 전송선 대신에 25Ω 특성임피던스 전송선을 사용하여 좋은 출력단 전력 정합과 출력 반사손실을 동시에 얻을 수 있었다. 제작된 전력증폭기의 측정결과, 주파수 27GHz에서 출력전력 23.4dBm과 Power-added Efficiency 21.7%의 결과를 보였다.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.8 no.8
• /
• pp.1705-1712
• /
• 2004

This paper presents a new low-cost RF Built-In Self-Test (BIST) circuit for measuring transducer voltage gain, noise figure and input impedance of 5.25GHz low noise amplifier (LNA). The BIST circuit is designed using 0.18${\mu}{\textrm}{m}$ SiGe technology. The test technique utilizes input impedance matching and output transient voltage measurements. The technique is simple and inexpensive. Total chip size has additional area of about 18% for BIST circuit.