• Transactions of the Korean Society of Mechanical Engineers B
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• v.37 no.3
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• pp.307-312
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• 2013

The interest in reducing the emissions and increasing the fuel economy of ICE vehicles has prompted research on hybrid vehicles, which come in the series, parallel, and power-split types. This study focuses on the series-type hybrid electric vehicle, which has a simple structure. Because each component of a series hybrid vehicle is larger than the corresponding component of the parallel type, the sizing of the vehicle is very important. This is because the performance may be greater or less than what is required. Thus, in this research, the optimal fuel economy was determined and simulated in a real-world system. The optimal sizing was achieved based on the motor, engine/generator, and battery for 13 cycles, where DP was used. The model was developed using ASCET or a Simulink-Amisim Co-simulation platform on the rapid controller prototype, ES-1000.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.17 no.2
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• pp.99-113
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• 1992

In general, TDMA and FDMA have been used for multiple access communication methods. Recently. However, ALOHA and CSMA protocols came to exist as new schemes for VSAT data networks and LANs, respectively. These schemes are proven to be effective for packet switched communication systems that has bursty traffic but packet collisions. In this paper we analyze capture statistics arising from fading channels in packet radio communication systems in the context of ALOHA protocol. We derive general results of the exact form of capture probabilities and present numerical data for wide range of fading parameters. Since the capture probabilities are found to approach zero when the number of transmitted signals become larger, we are able to determine the achievable channel throughput by a least squares fitting of an exponential-type function to the probabilities.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.1
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• pp.36-44
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• 2007

This paper presented a hybrid ternary encoding scheme using 3-valued logic. It can adapt to the delay-insensitive(DI) model. We designed an asynchronous wrapper for the hybrid ternary encoding scheme to communicate with various asynchronous encoding schemes. It reduced about 50% of transmission lines and power consumption compared with the conventional 1-of-4 and ternary encoding scheme. The proposed wrappers were designed and simulated using the $0.18-{\mu}m$ standard CMOS technology. As a result, the asynchronous wrapper operated over 2 GHz communicating with a system bus. Moreover, the power dissipation of the system bus adapted the hybrid ternary encoding logic decreases 65%, 43%, and 36% of the dual-rail, 1-of-4, and ternary encoding scheme, respectively. The proposed data encoding scheme and the wrapper circuit can be useful for asynchronous high-speed and low-power asynchronous interface.