• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.12
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• pp.84-89
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• 2010

In this paper, a novel voltage-controlled oscillator (VCO) using the microstrip square open loop dual split ring resonator is presented for reducing the phase noise. The square-shaped dual split ring resonator having the form of the microstrip square open loop is investigated to reduce the phase noise. Compared with the microstrip square open loop resonator and the microstrip square open loop split ring resonator as well as the conventional microstrip line resonator, the microstrip square dual split ring resonator has the larger coupling coefficient value, which makes a higher Q value, and has reduced the phase noise of VCO. The VCO with 1.7V power supply has the phase noise of -123.2~-122.0 dBc/Hz @ 100 kHz in the tuning range, 11.74~11.75 GHz. The figure of merit (FOM) of this VCO is-214.8~-221.7 dBc/Hz dBc/Hz @ 100 kHz in the same tuning range. Compared with VCO using the conventional microstrip line resonator, VCO using microstrip square open loop resonator, the phase noise of VCO using the proposed resonator has been improved in 26 dB, 10 dB, respectively.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.11
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• pp.56-60
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• 2009

In this paper, a novel voltage controlled oscillator (VCO) has been presented by using the microstrip square multiple spiral resonator for reducing the phase noise of VCO. The microstrip multiple square resonator has the large coupling coefficient value, which makes a high Q value, and has reduced phase noise of VCO. The VCO with 1.8 V power supply has phase noise of -115.0~-117.34 dBc/Hz @100 kHz in the tuning range, 8.935~9.4 GHz. When it has been compared with microstrip square multiple spiral resonator and coventional spiral resonator, the reduced Q value has been -32.7 dB and -57.6 dB respectively. This low phase noise VCO could ve available to a VCO in X-band.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.28 no.12
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• pp.941-947
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• 2017

This paper reports a fractional-N phase-locked-loop(PLL) frequency synthesizer that is implemented in a $0.35-{\mu}m$ standard CMOS process and generates a quadrature signal for an FRS terminal. The synthesizer consists of a voltage-controlled oscillator(VCO), a charge pump(CP), loop filter(LF), a phase frequency detector(PFD), and a frequency divider. The VCO has been designed with an LC resonant circuit to provide better phase noise and power characteristics, and the CP is designed to be able to adjust the pumping current according to the PFD output. The frequency divider has been designed by a 16-divider pre-scaler and fractional-N divider based on the third delta-sigma modulator($3^{rd}$ DSM). The LF is a third-order RC filter. The measured results show that the proposed device has a dynamic frequency range of 460~510 MHz and -3.86 dBm radio-frequency output power. The phase noise of the output signal is -94.8 dBc/Hz, and the lock-in time is $300{\mu}s$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.8
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• pp.576-582
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• 2018

In this paper, a planar equi-phase power divider is proposed using fixed phase shifters. As the integrability of a phased array antenna increases for accurate beam steering, a conventional method to excite equi-phase signals to all element antennas, extending the feedline, has spatial limitations. Therefore, the planar equi-phase power divider is designed using a defected ground structure with a planar phase shift function without intentional feedline extension. The defected ground structure has been considered for a low insertion loss and a controllable phase shift, whereas the power divider has been designed and implemented with a port-to-port isolation and a planar configuration.

• Proceedings of the Optical Society of Korea Conference
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• 2007.07a
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• pp.7-8
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• 2007

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.11
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• pp.1111-1116
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• 2011

In this paper, a 60 GHz bidirectional active phase shifter with 130 nm CMOS is presented by replacing CMOS passive switchs in switched-line type phase shifter with Common Gate Amplifier(bidirectional amplifier). Bidirectional active phase shifter is composed of bidirectional amplifier blocks and passive delay line network blocks. The suitable topology of bidirectional amplifier block is CGA(Common Gate Amplifier) topology and matching circuits of input and output are symmetrical due to design same characteristic of it's forward and reverse way. The direction(forward and reverse way) and amplitude of amplification can be controlled by only one bias voltage($V_{DS}$) using combination bias circuit. And passive delay line network blocks are composed of microstrip line. An 1-bit phase shifter is fabricated by Dongbu HiTek 1P8M 130-nm CMOS technology and simulation results present -3 dB average insertion loss and respectively 90 degree and 180 degree phase shift at 60 GHz.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.12
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• pp.16-21
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• 2007

In this paper, the dual-band voltage-controled oscillator (VCO) using the composite right/left-handed (CRLH) transmission line (TL) and the tunable negative resistance based on the fin diode is presented. It is demonstrated that the CRLH TL can lead to metamaterial transmission line with the dual-band tuning capability. The dual-band operation of the CRLH TL is achieved by the frequency offset and the phase slope of the CRLH TL, and the frequency ratio of the two operating frequencies can be a non-integer. Each frequency band of VCO has to operate independently, so we have used the tunable negative resistance based on the pin diode. When the forward bias has been into the pin diode, the phase noise of VCO is $-108.34\sim-106.67$ dBc/Hz @ 100 kHz in the tuning range, $2.423\sim2.597$ GHz, whereas when the reverse bias has been fed into the pin diode, that of VCO is $-114.16\sim-113.33$ dBc/Hz @ 100 kHz in the tuning range, $5.137\sim5.354$ GHz.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.10 s.352
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• pp.28-33
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• 2006

An integrated 3.125Gbps clock and data recovery (CDR) circuit is presented. The circuit does not need a reference clock. It has a phase and frequency detector (PFD), which incorporates a bang-bang type 4X oversampling PD and a rotational frequency detector (FD). It also has a ring oscillator type VCO with four delay stages and three zero-offset charge pumps. With a proposed PD and m, the tracking range of 24% can be achieved. Experimental results show that the circuit is capable of recovering clock and data at rates of 3.125Gbps with 0.18 um CMOS technology. The measured recovered clock jitter (p-p) is about 14ps. The CDR has 1.8volt single power supply. The power dissipation is about 140mW.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.1
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• pp.79-84
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• 2007

In this paper, a fully-integrated low phase noise multi-band CMOS VCO using automatic level controller (ALC) and switched LC tank has been presented. The proposed VCO has been fabricated in a 0.13-um CMOS process. The switched LC tank has been designed with a pair of capacitors and two pairs of inductors switched using MOS switch. By using this structure, four band (2.986 ${\sim}$ 3.161, 3.488 ${\sim}$ 3.763, 4.736 ${\sim}$ 5.093, and 5.35 ${\sim}$ 5.887 GHz) operation is achieved in a single VCO. The VCO with 1.2 V power supply has phase noise of -118.105 dBc/Hz @ 1 MHz at 2.986 GHz and -113.777 dBc/Hz @ 1 MHz at 5.887 GHz, respectively. The reduced phase noise has been approximately -1 ${\sim}$ -3 dBc/Hz @ 1 MHz in the broadest tuning range, 2.986 ${\sim}$ 5.887 GHz. The VCO has consumed 4.2 ${\sim}$ 5.4 mW in the entire frequency band.

• Proceedings of the Optical Society of Korea Conference
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• 2000.02a
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• pp.306-307
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• 2000

1962년 Armstrong 등에 의해 second harmonic generation(SHG) 의 이론이 완성된 후 SHG 효율을 높이기 위한 방법으로 비선형성이 큰 물질의 개발과 더불어 위상정합(phase matching)을 만족시키는 여러가지 방법이 연구 되었다. 특히 위상정합의 경우 지금까지는 복굴절을 이용하는 방법이 널리 사용되었으나 이 경우 입사광의 파장이 제한적이고, 많은 무기물 결정에서 비선형광학계수의 가장 큰 텐서 성분인 $d_{zzz}$를 사용할 수 없다는 단점을 가지고 있다. 반면 유사위상정합(Quasi-phase matching:QPM) 은 비선형광학계수( $d_{zzz}$)의 방향을 결맞음 길이(coherence length)마다 분극반전 시켜주어 2차 조화파의 진폭을 길이방향으로 계속 증가시키는 방법으로 구역반전된 길이를 조절하면 거의 모든 파장에 대해 비임계 위상정합( $d_{zzz}$ 사용)이 가능하고, 2차 조화파가 기본파의 전파경로에서 벗어나는 walk-off 현상이 없어 SHG 전환효율을 극대화할 수 있다. (중략). (중략)