• Proceedings of the Korean Information Science Society Conference
• /
• 2001.10c
• /
• pp.151-153
• /
• 2001

문선 채널에서 신뢰성 있는 실시간 동영상 서비스를 하기 위해서는 비디오 스트림 내에서 오류가 발생한 블록의 위치를 알아야 정확한 오류 복구가 가능하다. 이전의 오류 검출 연구들은 대부분 픽셀 단위로 비교하므로 계산량이 많은 문제점이 있다. 본 논문에서는 실시간 서비스를 고려하여 계산량이 적은 블록 단위의 오류 검출 기법을 제안한다. 블록 내의 DCT 계수를 이용하여 오류를 검출한다. DC 계수를 이용해 1차 임계치를 비교한 후 AC 계수를 이용해 에지를 검출한다. 애지가 존재하는 블록에 대해 2차 임계치를 비교하여 오류 여부를 판단한다. DCT 계수 정보를 직접 이용할 수 없는 P, B 프레임에서 DCT 계수를 추정할 수 있는 방법도 함께 제안한다. 제안한 오류 검출 기법을 실제 구현하여 성능을 측정한다.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.26 no.4B
• /
• pp.427-436
• /
• 2001

RS product codes are widely used in digital storage systems. There are lots of decoding strategies for product code for short-length RS codes. Unfortunately many of them cannot be applied to long-length RS product codes because of the complexity of decoder. This paper proposes new decoding strategies which can be used in long length RS product codes.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.14 no.6
• /
• pp.590-603
• /
• 1989

In tnis paper, the CRC-CCITT code and primitive polynomial CRC code are selected for analysing error detecting performance. However, general formulas for obtaining the weight distribution of these two CRC codes are not so far dericed. So, a new method for calculating the weight distribution of the shortened cyclic Hamming code is presented and an undetected error probability of these two codes is obtained when used in cell of ATM for broadband ISDN user-network interface. Consequently, we show that CRC code too much does affect its error detection performance. All the computer simulation is performed by IBM PC/AT.

• Journal of Korea Society of Industrial Information Systems
• /
• v.20 no.5
• /
• pp.13-23
• /
• 2015

This thesis proposes a method for effectively detecting memory errors with low occurrence frequency that may occur depending on runtime situation by analyzing assembly codes obtained by disassembling an executable file. When applying the proposed method to various programs having no compilation error, a total of about 750 potential errors taken about 90 seconds are detected among 1 million lines of assembly codes corresponding to a total of about 10 thousand functions.

• Journal of Advanced Navigation Technology
• /
• v.11 no.4
• /
• pp.485-492
• /
• 2007

In this paper, we propose the receiver block error detection of the video codec and the image concealment algorithm using fuzzy inference. The proposed error detection and concealment algorithm gets SSD(Summation of Squared Difference) and BMC(Boundary Matching Coefficient) using the temporal and spatial similarity between corresponded blocks in the two successive frames. Proportional constant, ${\alpha}$, for threshold value, TH1 and TH2, is decided after fuzzy data is generated by each parameter. To examine the propriety of the proposed algorithm, random errors are inserted into the QCIF Susie standard image, then the error detection and concealment performance is simulated. To evaluate the efficiency of the algorithm, image quality is evaluated by PSNR for the error detection and concealed image by the existing VLC table and by the proposed method. In the experimental results, the error detection algorithm could detect all of the inserted error, the image quality is improved over 15dB after the error concealment compare to existing error detection algorithm.

• Journal of the Korea Society of Computer and Information
• /
• v.16 no.12
• /
• pp.11-21
• /
• 2011

An embedded sensor is significantly influenced by its spatial environment, such as barriers or distance, through low power and signal strength. Due to these causes, noise data frequently occur in an embedded sensor. Because the information acquired from the embedded sensor exists in a time series, it is hard to detect an error which continuously takes place in the time series information on a realtime basis. In this paper, we proposes an error detection method based on time-series prediction that detects error signals of embedded sensors in real time in consideration of the physical characteristics of embedded devices. The error detection method based on time-series prediction proposed in this paper determines errors in generated embedded device signals using a stable distance function. When detecting errors by monitoring signals from an embedded device, the stable distance function can detect error signals effectively by applying error weight to the latest signals. When detecting errors by monitoring signals from an embedded device, the stable distance function can detect error signals effectively by applying error weight to the latest signals.

• Journal of IKEEE
• /
• v.26 no.3
• /
• pp.437-444
• /
• 2022

This paper proposes a CRC error verification method for SPI and I2C buses of automotive semiconductors. In automotive semiconductors, when an error occurs in communication and an incorrect value is transmitted, fatal results may occur. Unlike LIN communication and CAN communication, in communication such as SPI and I2C, there is no frame for detecting an error, so some definitions of new standards are required. Therefore, in this paper, the CRC error detection mode is newly defined in the SPI and I2C communication protocols, and the verification is presented by designing it in hardware.

• Annual Conference on Human and Language Technology
• /
• 2012.10a
• /
• pp.132-137
• /
• 2012

본 논문에서는 세종형태분석 말뭉치에 포함되어 있는 오류를 효율적으로 수정하기 위하여 오류 수정도구를 개발하였다. 세종형태분석 말뭉치에서 오류를 검출하기 위하여 형태소 생성과 자동 띄어쓰기 방법을 이용하였다. 검출된 오류를 수정하기 위하여 철자 오류 수정, 형태소 삭제 수정, 형태소 삽입 수정, 어절 재분석 방법을 사용하였다. 또한 최대한 반복적인 작업은 수행하지 않도록 설계하였다. 구현된 오류 수정 도구를 통하여 세종형태분석 말뭉치를 수정하였을 경우 텍스트 파일 형태의 말뭉치에서 오류를 수정하는 것보다 최소 9배 이상 빠른 작업이 가능하였으며, 사용자가 오류 수정 작업을 진행할수록 수정 속도가 빨라짐을 실험을 통해서 알 수 있었다.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.41 no.11
• /
• pp.1356-1363
• /
• 2016

In this paper, we propose a novel error detection algorithm for LZ78-compressed data. The conventional error detection method adds a certain number of parity bits in transmission, and the receiver checks the number of bits representing '1' to detect the errors. These conventional methods use additional bits resulting in increased redundancy in the compressed data which results in reduced effectiveness of the final compressed data. In this paper, we propose error detection algorithm using the structural properties of LZ78 compression without using additional bits in the compressed data. The simulation results show that the error detection ratio of the proposed algorithm is about 1.3 times better for error detection than conventional algorithms.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.35 no.6B
• /
• pp.948-953
• /
• 2010

In this paper, we propose multi-bit soft error detection method which can use an instruction cache of superscalar CPU architecture. Proposed method is applied to high-speed static RAM for instruction cache. Using 1D parity and interleaving, it has less memory overhead and detects more multi-bit errors comparing with other methods. It only detects occurrence of soft errors in static RAM. Error correction is treated like a cache miss situation. When soft errors are occurred, it is detected by 1D parity. Instruction cache just fetch the words from lower-level memory to correct errors. This method can detect multi-bit errors in maximum 4$\times$4 window.