• Title/Summary/Keyword: 연산호

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Optimized AntNet-Based Routing for Network Processors (네트워크 프로세서에 적합한 개선된 AntNet기반 라우팅 최적화기법)

  • Park Hyuntae;Bae Sung-il;Ahn Jin-Ho;Kang Sungho
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.5 s.335
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    • pp.29-38
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    • 2005
  • In this paper, a new modified and optimized AntNet algorithm which can be implemented efficiently onto network processor is proposed. The AntNet that mimics the activities of the social insect is an adaptive agent-based routing algorithm. This method requires a complex arithmetic calculating system. However, since network processors have simple arithmetic units for a packet processing, it is very difficult to implement the original AntNet algorithm on network processors. Therefore, the proposed AntNet algorithm is a solution of this problem by decreasing arithmetic executing cycles for calculating a reinforcement value without loss of the adaptive performance. The results of the simulations show that the proposed algorithm is more suitable and efficient than the original AntNet algorithm for commercial network processors.

Design of High Speed Modular Exponentiation Operation Method for RSA Algorithm (RSA 알고리즘 부하 경감을 위한 고속 모듈러 멱승 연산 알고리즘 설계)

  • Kim, Kap-Yol;Lee, Chul-Soo;Park, Seok-Cheon
    • The KIPS Transactions:PartC
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    • v.15C no.6
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    • pp.507-512
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    • 2008
  • At a recent, enterprises based on online-service are established because of rapid growth of information network. These enterprises collect personal information and do customer management. If customers use a paid service, company send billing information to customer and customer pay it. Such circulation and management of information is big issue but most companies don't care of information security. Actually, personal information that was managed by largest internal open-market was exposed. For safe customer information management, this paper proposes the method that decrease load of RSA cryptography algorithm that is commonly used for preventing from illegal attack or hacking. The method for decreasing load was designed by Binary NAF Method and it can operates modular Exponentiation rapidly. We implemented modular Exponentiation algorithm using existing Binary Method and Windows Method and compared and evaluated it.

An Efficient Evolutionary Algorithm for Optimal Arrangement of RFID Reader Antenna (RFID 리더기 안테나의 최적 배치를 위한 효율적인 진화연산 알고리즘)

  • Soon, Nam-Soon;Yeo, Myung-Ho;Yoo, Jae-Soo
    • Proceedings of the Korea Contents Association Conference
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    • 2009.05a
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    • pp.715-719
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    • 2009
  • Incorrect deployment of RFID readers occurs reader-to-reader interferences in many applications using RFID technologies. Reader-to-reader interference occurs when a reader transmits a signal that interferes with the operation of another reader, thus preventing the second reader from communicating with tags in its interrogation zone. Interference detected by one reader and caused by another reader is referred to as a reader collision. In RFID systems, the reader collision problem is considered to be the bottleneck for the system throughput and reading efficiency. In this paper, we propose a novel RFID reader anti-collision algorithm based on evolutionary algorithm(EA). First, we analyze characteristics of RFID antennas and build database. Also, we propose EA encoding algorithm, fitness algorithm and genetic operators to deploy antennas efficiently. To show superiority of our proposed algorithm, we simulated our proposed algorithm. In the result, our proposed algorithm obtains 95.45% coverage rate and 10.29% interference rate after about 100 generations.

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Real-time implementation of the 2.4kbps EHSX Speech Coder Using a $TMS320C6701^TM$ DSPCore ($TMS320C6701^TM$을 이용한 2.4kbps EHSX 음성 부호화기의 실시간 구현)

  • 양용호;이인성;권오주
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.7C
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    • pp.962-970
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    • 2004
  • This paper presents an efficient implementation of the 2.4 kbps EHSX(Enhanced Harmonic Stochastic Excitation) speech coder on a TMS320C6701$^{TM}$ floating-point digital signal processor. The EHSX speech codec is based on a harmonic and CELP(Code Excited Linear Prediction) modeling of the excitation signal respectively according to the frame characteristic such as a voiced speech and an unvoiced speech. In this paper, we represent the optimization methods to reduce the complexity for real-time implementation. The complexity in the filtering of a CELP algorithm that is the main part for the EHSX algorithm complexity can be reduced by converting program using floating-point variable to program using fixed-point variable. We also present the efficient optimization methods including the code allocation considering a DSP architecture and the low complexity algorithm of harmonic/pitch search in encoder part. Finally, we obtained the subjective quality of MOS 3.28 from speech quality test using the PESQ(perceptual evaluation of speech quality), ITU-T Recommendation P.862 and could get a goal of realtime operation of the EHSX codec.c.

Technique of Sea-fog Removal base on GPU (GPU 기반의 해무제거 기술)

  • Choi, Woonsik;Ha, Jun;Youn, Woosang;Kwak, Jaemin;Choi, Hyunjun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.05a
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    • pp.576-578
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    • 2015
  • This paper propose the help of the secure a clear view and safe navigation of the coastal ship through the sea-fog removal algorithm. Interest in marine accidents and vessel safety has increased in recent Sewol ferry event. According to statistics coastal ship cause of the marine accident when sea fog on the sea did not secure clear view the ship's occur several incidents of collisions between ships and can see that accounts for a high percentage. Algorithm for image exist sea fog is number of studies. but, such studies take up a lot of calculation quantity in the course of performing the algorithm. In this paper, we improve the computational speed of sea fog over the GPU-based technique was removed to suit real-time video. Furthermore, by using GPU, we succeeded in accelerating the simulation 250 times.

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A Low Power Resource Allocation Algorithm based on Minimizing Switching Activity (스위칭 동작 최소화를 통한 저 전력 자원할당 알고리즘)

  • Lin, Chi-Ho
    • Journal of IKEEE
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    • v.10 no.2 s.19
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    • pp.103-108
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    • 2006
  • This paper proposed a low power resource allocation algorithm for the minimum switching activity of operators in high level synthesis. In this paper, the proposed method finds switching activity in circuit each functional unit exchange for binary sequence length and value bit are logic one value. To use the switching activity was found the allocation with minimal power consumption, the proposed method visits all control steps one by one and determines the allocation with minimal power consumption at each control step. As the existing method, the execution time can be fast according to use the number of operator and maximal control step. And it is the reduction effect from 8.5% to 9.3%.

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Bus and Registor Optimization in Datapath Synthesis (데이터패스 합성에서의 버스와 레지스터의 최적화 기법)

  • Sin, Gwan-Ho;Lee, Geun-Man
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.8
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    • pp.2196-2203
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    • 1999
  • This paper describes the bus scheduling problem and register optimization method in datapath synthesis. Scheduling is process of operation allocation to control steps in order to minimize the cost function under the given circumstances. For that purpose, we propose some formulations to minimize the cost function for bus assignment to get an optimal and minimal cost function in hardware allocations. Especially, bus and register minimization technique are fully considered which are the essential topics in hardware allocation. Register scheduling is done after the operation and bus scheduling. Experiments are done with the DFG model of fifth-order digital ware filter to show its effectiveness. Structural integer programming formulations are used to solve the scheduling problems in order to get the optimal scheduling results in the integer linear programming environment.

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Building Boundary Reconstruction from Airborne Lidar Data by Adaptive Convex Hull Algorithm (적응적 컨벡스헐 알고리즘을 이용한 항공라이다 데이터의 건물 경계 재구성)

  • Lee, Jeong-Ho;Kim, Yong-Il
    • Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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    • v.30 no.3
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    • pp.305-312
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    • 2012
  • This paper aims at improving the accuracy and computational efficiency in reconstructing building boundaries from airborne Lidar points. We proposed an adaptive convex hull algorithm, which is a modified version of local convex hull algorithm in three ways. The candidate points for boundary are first selected to improve efficiency depending on their local density. Second, a searching-space is adjusted adaptively, based on raw data structure, to extract boundary points more robustly. Third, distance between two points and their IDs are utilized in detecting the seed points of inner boundary to distinguish between inner yards and inner holes due to errors or occlusions. The practicability of the approach were evaluated on two urban areas where various buildings exist. The proposed method showed less shape-dissimilarity(8.5%) and proved to be two times more efficient than the other method.

An Active Candidate Set Management Model on Association Rule Discovery using Database Trigger and Incremental Update Technique (트리거와 점진적 갱신기법을 이용한 연관규칙 탐사의 능동적 후보항목 관리 모델)

  • Hwang, Jeong-Hui;Sin, Ye-Ho;Ryu, Geun-Ho
    • Journal of KIISE:Databases
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    • v.29 no.1
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    • pp.1-14
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    • 2002
  • Association rule discovery is a method of mining for the associated item set on large databases based on support and confidence threshold. The discovered association rules can be applied to the marketing pattern analysis in E-commerce, large shopping mall and so on. The association rule discovery makes multiple scan over the database storing large transaction data, thus, the algorithm requiring very high overhead might not be useful in real-time association rule discovery in dynamic environment. Therefore this paper proposes an active candidate set management model based on trigger and incremental update mechanism to overcome non-realtime limitation of association rule discovery. In order to implement the proposed model, we not only describe an implementation model for incremental updating operation, but also evaluate the performance characteristics of this model through the experiment.

High-Performance and Low-Complexity Decoding of High-Weight LDPC Codes (높은 무게 LDPC 부호의 저복잡도 고성능 복호 알고리즘)

  • Cho, Jun-Ho;Sung, Won-Yong
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.5C
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    • pp.498-504
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    • 2009
  • A high-performance low-complexity decoding algorithm for LDPC codes is proposed in this paper, which has the advantages of both bit-flipping (BF) algorithm and sum-product algorithm (SPA). The proposed soft bit-flipping algorithm requires only simple comparison and addition operations for computing the messages between bit and check nodes, and the amount of those operations is also small. By increasing the utilization ratio of the computed messages and by adopting nonuniform quantization, the signal-to-noise ratio (SNR) gap to the SPA is reduced to 0.4dB at the frame error rate of 10-4 with only 5-bit assignment for quantization. LDPC codes with high column or row weights, which are not suitable for the SPA decoding due to the complexity, can be practically implemented without much worsening the error performance.