• Title/Summary/Keyword: 연산증폭기

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Radiation Effects on PWM Controller of DC/DC Power Buck Converter (DC/DC 전력 강압 컨버터의 PWM 제어기 방사선 영향)

  • Lho, Young-Hwan
    • Journal of the Korean Society for Railway
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    • v.15 no.2
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    • pp.116-121
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    • 2012
  • DC/DC switching power converters produce DC output voltages from different DC input sources. The converter is used in regenerative braking of DC motors to return energy back in the supply, resulting in energy savings for the systems containing frequent stops. The DC/DC converter is composed of a PWM-IC (pulse width modulation integrated circuit) controller, a MOSFET (metal-oxide semi-conductor field-effect transistor), an inductor, capacitors, and resistors, etc. PWM is applied to control and regulate the total output voltage. In this paper, radiation shows the main influence on the changes in the electrical characteristics of comparator, operational amplifier, etc. in PWM-IC. In the PWM-IC operation, the missing pulses, the changes in pulse width, and the changes of the output waveform are studied by the simulation program with integrated circuit emphasis (SPICE) and compared with experiments.

Macro Model of DWFG MOSFET for Analog Application and Design of Operational Amplifier (아날로그 응용을 위한 DWFG MOSFET의 매크로 모델 및 연산증폭기 설계)

  • Ha, Ji-Hoon;Baek, Ki-Ju;Lee, Dae-Hwan;Na, Kee-Yeol;Kim, Yeong-Seuk
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.26 no.8
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    • pp.582-586
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    • 2013
  • In this paper, a simple macro model of n-channel MOSFET with dual workfunction gate (DWFG) structure is proposed. The DWFG MOSFET has higher transconductance and lower drain conductance than conventional MOSFET. Thus analog circuit design using the DWFG MOSFET can improve circuit characteristics. Currently, device models of the DWFG MOSFET are insufficient, so simple series connected two MOSFET model is proposed. In addition, a two stage operational amplifier using the proposed DWFG MOSFET macro model is designed to verify the model.

A 1.5V 70dB 100MHz CMOS Class-AB Complementary Operational Amplifier (1.5V 70dB 100MHz CMOS Class-AB 상보형 연산증폭기의 설계)

  • 박광민
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.15 no.9
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    • pp.743-749
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    • 2002
  • A 1.5V 70㏈ 100MHz CMOS class-AB complementary operational amplifier is presented. For obtaining the high gain and the high unity gain frequency, the input stage of the amplifier is designed with rail-to-rail complementary differential pairs which are symmetrically parallel-connected with the NMOS and the PMOS differential input pairs, and the output stage is designed to the rail-to-rail class-AB output stage including the elementary shunt stage technique. With this design technique for output stage, the load dependence of the overall open loop gain is improved and the push-pull class-AB current control can be implemented in a simple way. The designed operational amplifier operates perfectly on the complementary mode with 180$^{\circ}$ phase conversion for 1.5V supply voltage, and shows the push-pull class-AB operation. In addition, the amplifier shows the DC open loop gain of 70.4 ㏈ and the unity gain frequency of 102 MHz for $C_{L=10㎊∥}$ $R_{L=1㏁}$ Parallel loads. When the resistive load $R_{L}$ is varied from 1 ㏁ to 1 ㏀, the DC open loop gain of the amplifier decreases by only 2.2 ㏈.a$, the DC open loop gain of the amplifier decreases by only 2.2 dB.

Derivative Thermometric Titrations Employing Operational Amplifier Instrumentation (연산증폭기를 사용한 미분법 열적정장치)

  • Czae, Myung-Zoon;Pyun, Chong-Hong;Kim, Sang-Ok
    • Journal of the Korean Chemical Society
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    • v.14 no.4
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    • pp.341-345
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    • 1970
  • An improved derivative thermometric titration apparatus designed around operational amplifiers is described which is capable of monitoring the small temperature change and of computing the derivatives for accentuation of the titration end point that is difficult to locate by extrapolation methods. The instrument is constructed of four commercial operational amplifiers. A use of dummy cell provides the subtraction means for compensation of the initial temperature and random temperature fluctuations with a resultant gain in signal-to-noise ratio. The successive differentiation action of the computer has been nearly "perfect," so that the two breaks (blank or starting and end point of the titration curve can be located with the precision of 0.2% by observing two peak points on the second derivative curve. Arrangements useful in obtaining such a good derivative response that is exactly proportional to the input signal are discussed. Plots of the enthalphogram and its derivatives are presented, with the results of several titrations used to evaluate the performance of the apparatus.

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Layout Automation of Integrated Circuits Based on Analog Constraints (아날로그 제약 조건을 고려한 집적회로의 레이아웃 자동화)

  • Cho, Hyun-Sang;Kim, Young-Soo;Oh, Jeong-Hwan;Yoon, Kwang-Sub;Han, Chang-Ho
    • The Transactions of the Korea Information Processing Society
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    • v.4 no.8
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    • pp.2120-2132
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    • 1997
  • A layout automation system for analog integrated circuits is proposed. The implemented system performs full-custom analog layout under the analog layout constraints. In order to overcome the demerits of conventional analog layout systems, parameterized module library is proposed. The system can support complex analog layout modules, resulting in a maximum expandability of the system. Moreover, modified dynamic multi-path algorithm is developed by enhancing the conventional Dijkstra algorithm. Several benchmark circuits such as comparator, op amp, and filter was tested by the system. Layout results compared to OPASYN show well-merging layout and interdigitized layout module.

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Design of the New Third-Order Cascaded Sigma-Delta Modulator for Switched-Capacitor Application (스위치형 커패시터를 적용한 새로운 형태의 3차 직렬 접속형 시그마-델타 변조기의 설계)

  • Ryu Jee-Youl;Noh Seok-Ho
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2006.05a
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    • pp.906-909
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    • 2006
  • This paper proposes a new body-effect compensated switch configuration for low voltage and low distortion switched-capacitor (SC) applications. The proposed circuit allows rail-to-rail switching operation for low voltage SC circuits and has better total harmonic distortion than the conventional bootstrapped circuit by 19 dB. A 2-1 cascaded sigma-delta modulator is provided for performing the high-resolution analog-to-digital conversion on audio codec in a communication transceiver. An experimental prototype for a single-stage folded-cascode operational amplifier (opamp) and a 2-1 cascaded sigma-delta modulator has been implemented in a 0.25 micron double-poly, triple-metal standard CMOS process with 2.7 V of supply voltage.

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Improvement in Design of Versatile Active R Filter as Building Block (다능성 능동 저항 여파기 설계의 개선에 관한 연구)

  • 나종범
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.15 no.2
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    • pp.22-27
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    • 1978
  • An improved active R filter is proposed which contains only resistors and two operational amplifiers represented by their single pole model. The filter has very low sensitivities to all circuit parameters, is suitable for low frequency and low 9 applications in addition to high frequency and high 0, and realizes various biquadratic transfer functions simultaneously with lower resistance ratios. The independent control of design specifications is possible in the circuit. Experimental results in laboratory are presented.

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A Design of Muti-Octave Ultra Wideband Frequency Synthesizer (멀티 옥타브 초광대역 주파수 합성기 설계)

  • Shin, Geum-Sik;Koo, Bon-San;Lee, Moon-Que
    • Proceedings of the KIEE Conference
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    • 2004.07c
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    • pp.2017-2019
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    • 2004
  • 본 논문에서는 S/C-밴드(2${\sim}$8GHz)에서 동작하는 초광대역 주파수 합성기를 설계하였다. 먼저 S-밴드(2-4GHz) 광대역 전압제어발진기를 가지고 획득시간을 단축하기 위한 연산 증폭기를 사용한 DA변환기와 능동루프 필터(Active Loop Filter)로 구성된 S-밴드 주파수 합성기를 설계하였다. 그리고 주파수 체배기, SPDT RF 스위치를 통합하여 최종적으로 S/C-밴드 초광대역 주파수 합성기를 설계하였다. 제작된 주파수 합성기는 200kHz 비교주파수에서 위상잡음은 100kHz 옵셋 주파수에서 -92dBc/Hz이하, 불요주파수 특성은 -62.33dBc 이하, 획득시간은 1.3ms 이하로 측정되었다.

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Novel Testing Method of CMOS Operation Amplifier using Offset Voltage (오프셋 전압을 이용한 CMOS 연산 증폭기의 새로운 테스팅 기법)

  • 한석붕;윤원효
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.507-510
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    • 1998
  • In this paper, a novel test method is proposed to detect hard and soft fault in CMOS operational amplifiers. Proposed test method mark use of the offset character, which is one of the op-amps characteristics. During the test mode, CUT is implemented to unit gain op-amps with feedback loop. When the input is grounded, a good circuit has a small offset voltage, but a faulty circuit has a large offset voltage exceeding predefined range of tolerance. Using the proposed method, no test vector is required to be applied. Therefore the test vector generation problem is eliminated and the test time is reduced. The accuracy and effectiveness of the method is verified through HSPICE simulation.

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A Comparison of DC-DC Buck Converter Controller (DC-DC 벅 컨버터 제어기 비교)

  • Kang, Min Gu
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.7
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    • pp.281-285
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    • 2013
  • Transfer function of Buk DC-DC converter is derived using Laplace transformed LC filter. Using root locus and simulation waveform, this paper shows that Type2 controller proposed in reference has poor performance. Using root locus PI controller has designed. Using operational amp, PI controller is realized. Properly operated Type2 controller is proposed and proved using simulation result.