• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2008년도 춘계종합학술대회 A
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• pp.740-743
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• 2008

본 연구에서는 MicroTec을 이용하여 MOSFET Process 설계를 구현하였다. MOS(Metal Oxide Semiconductor)는 실리콘 기판 등의 반도체 표면에 산화막을 입히고 그 위에 금속을 부착시킨 구조이다. MOSFET의 응용은 VLSI 회로에만 제한되지 않고 전력-전자 회로에서 중요한 역할을 하며 점점 더 적용범위를 증가시켜 마이크로파 응용에 이르기까지 광범위하게 사용하고 있다. Process를 구연하는 방법은 Grid의 크기를 지정하고, 기판의 원소는 B로 지정하고 $1{\times}10^{15}/cm^3$ 만큼 도핑한다. 기판에 구멍을 내어 B와 As의 도핑농도와 에너지값을 설정한다. 마지막으로 어넬링 파라미터 값을 설정한다. 본 연구에서는 원소의 도핑값과 에너지값의 변화에 따른 MOSFET Process의 변화를 알 수 있었다.

• 한국진공학회지
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• 제18권2호
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• pp.147-150
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• 2009

Polydimethylsiloxane (PDMS) 기능성 박막을 도입하여 적은 게이트 누설 전류 특성을 가지는 유기트랜지스터를 제작하고 평가하였다. UV/ozone 처리를 하여 PDMS 표면에 위치한 소수성의 메틸 그룹의 화학적 결합을 끊어 친수성 실리콘 산화막 성질로 표면을 변화시키고 선택적인 펜타신 증착을 유도하였다. Off 전압상태 ($V_g-V_t>0$)에서 게이트 전압에 의해 기인하는 누설 전류는 선형영역 ($V_d=-5\;V$)과 포화영역 ($V_d=-30\;V$)에서 ${\sim}10^{-10}$ A의 값을 보여주며 기존의 트랜지스터 보다 개선된 누설 전류 특성을 나타내었다.

• 전자공학회논문지A
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• 제32A권11호
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• pp.35-43
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• 1995

To obtain high quality of $Ta_{2}O_{5}$ film, two dielectric layers of $Si_{3}N_{4}$ and $Ta_{2}O_{5}$ were subsequently formed on Si wafer. Silicon nitride films were thermally grown in 10 Torr ammonia ambient by R.F induced heating system. The thickness of thermally grown $Si_{3}N_{4}$ film was able to be controlled in the range of tens $\AA$ due to the self-limited growth property. $Ta_{2}O_{5}$ film of 200$\AA$ thickness was then deposited on the as-grown $Si_{3}N_{4}$ film about 25$\AA$ thickness by sputtering method and annealed at $900^{\circ}C$in $O_{2}$ ambient for 1hr. Stoichiometry film was prepared by the annealing in oxygen ambient. Despite the high temperature anneal process, silicon oxide layer was not grown at the interface of the layered films because of the oxidation barrier effect of Si$_{3}$N$_{4}$ film. The fabricated $Ta_{2}O_{5}$/$Si_{3}N_{4}$ film showed low leakage current less than several nA and high dielectric breakdown strength.

• 전자공학회논문지A
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• 제28A권12호
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• pp.59-64
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• 1991

Thin (25-103$\AA$) SiO$_2$ films are grown using the rapid thermal oxidation processing at temperatures of 105$0^{\circ}C$-115$0^{\circ}C$ for 5-30 sec, in order to investigate the characteristics of ultra thin oxide. For measuring the thickness of oxide TEM, ellipsometry, and C-V method which is taken in the condition of small surface band bending are used and compared. When neglecting the small deviation affected by both interface state and moisture charge effect, those three methods described above give similar results. In order to examine the effect of rapid thermal annealing, part of samples are annealed in N$_2$ ambient. MOS capacitors are fabricated and the characteristics of I-V and C-V are measured. Measurements show that the activation energy of initial thickness of oxide grown during the ramp-up time is of 1.125eV and the activation energy of the oxidation rate is of 0.98eV. As oxidation temperature is increased, dielectric breakdown field E$_{BD}$ is decreased due to the increase of fixed charge density N$_f$ However, E$_{BD}$ is shown to be decreased as increasing the thickness of oxide. The increase of N$_f$ in the early stage of thermal annealing results in the decrease of E$_{BD}$.

• 한국컴퓨터산업학회논문지
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• 제8권1호
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• pp.17-22
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• 2007

본 연구에서는 선택적 영역에서 반도체 성질을 갖는 탄소나노튜브을 합성하기 위해 촉매의 구조 및 형태가 탄소나노튜브의 성장에 미치는 영향을 연구하였다. CVD 방법으로 Fe와 Mo 전이 금속을 알루미나 나노 입자속에 삽입한 액상형태의 촉매구조와 박막형태의 나노 덩어리 Fe 금속박막을 증착한 후 실리콘 산화막$(SiO_2/Si)$ 기판에 $700^{\circ}C$ 온도에서 에틸렌$(C_2H_4)$가스를 사용하여 디바이스 사이에 정렬된 탄소나노튜브의 합성 연구를 수행 하였으며, 탄소나노튜브의 성장특성은 SEM과 AFM을 이용하여 분석하였다.

• 전기학회논문지
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• 제65권10호
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• pp.1694-1696
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• 2016

Present thin film solar cells with hydrogenated amorphous silicon oxide (a-SiO:H) as an absorber suffer from low fill factor(FF) of 61~64 [%] in spite of its benefits related to high open circuit voltage ($V_{oc}$). Since degraded quality of a-SiO:H absorber by alloying with oxygen can affect the FF, we aimed to achieve high photosensitivity by minimizing $CO_2$ gas addition. Improving optical gap($E_{opt}$) has been attained by strong hydrogen dilution combined with lowering substrate temperature down to 100 [$^{\circ}C$]. Small amount of the $CO_2$ was added in order to disturb microcrystalline formation by high hydrogen dilution. The developed a-SiO:H has high photosensitivity (${\sim}2{\times}10^5$) and high $E_{opt}$ of 1.85 [eV], which contributed to attain remarkable FF of 74 [%] and high $V_{oc}$ (>1 [V]). As a result, high power conversion efficiency of 7.18 [%] was demonstrated by using very thin absorber layer of only 100 [nm], even though we processed all experiment at extremely low temperature of 100 [$^{\circ}C$].

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제49권1호
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• pp.24-29
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• 2000

We propose a simple method to control the crystallization depth of amorphous silicon (a-Si) deposited by PECVD or LPCVD during the excimer laser annealing (ELA). Employing the new method, we have formed poly-Si/a-Si double film and fabricated a new poly-Si TFT with vertical a-Si offsets between the poly-Si channel and the source/drain of TFT without any additional photo-lithography process. The maximum leakage current of the new poly-Si TFT decreased about 80% due to the highly resistive vertical a-Si offsets which reduce the peak electric field in drain depletion region and suppress electron-hole pair generation. In ON state, current flows spreading down through broad a-Si cross-section in the vertical a-Si offsets and the current density in the drain depletion region where large electric field is applied is reduced. The stability of poly-Si TFT has been improved noticeably by suppressing trap state generation in drain region which is caused by high current density and large electric field. For example, ON current of the new TFT decreased only 7% at a stress condition where ON current of conventional TFT decreased 89%.

• 한국전기전자재료학회논문지
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• 제30권2호
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• pp.115-118
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• 2017

Highly photosensitive and wide bandgap amorphous silicon oxide (a-$SiO_x$:H) films were developed at low temperature ranges ($100{\sim}150^{\circ}C$) with employing plasma-enhanced chemical vapor deposition by optimizing $H_2/SiH_4$ gas ratio and $CO_2$ flow. Photosensitivity more than $10^5$ and wide bandgap (1.81~1.85 eV) properties were used for making the a-$SiO_x$:H thin film solar cells, which exhibited a high open circuit voltage of 0.987 V at the substrate temperature of $100^{\circ}C$. In addition, a power conversion efficiency of 6.87% for the cell could be improved up to 7.77% by employing a new n-type nc-$SiO_x$:H/ZnO:Al/Ag triple back-reflector that offers better short circuit currents in the thin film photovoltaic devices.

• 전자공학회논문지D
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• 제35D권7호
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• pp.72-78
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• 1998

This paper is focused on the fabrication of reliable novel antifuse, which could operate at low voltage along with the improvement in OFF and ON-state properties. The fabricated antifuse consists of Al/BaTi$_{2}$O$_{3}$/SiO$_{2}$/TiW-silicide structure. Through the systematic analyses for bottom metal and the intermetallic insulator, material and electri cproperties were investiaged. TiW-silicide as the bottom electrode had smooth surface with average roughness of 11.angs. at 10X10.mu.m$^{2}$ and was bing kept as-deposited SiO$_{2}$ film stable. Amorphous BaTi$_{2}$O$_{3}$ film as the another insulator was chosen because of its low breakdown strength (2.5MV/cm). breakdown voltage of antifuse is remarkably reduced by using BaTi$_{2}$O$_{3}$ film, and leakage current of that maintained low level due to the SiO$_{2}$ film. Low ON-resistance (46.ohm./.mu.m$^{2}$) and low programming voltage(9.1V) can be obtained in theses antifuses with 220.angs. double insulator layer and 19.6X10$^{-6}$ cm$^{2}$ area, while keeping sufficient OFF-state reliability (less than 1nA).

• 대한전자공학회논문지SD
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• 제41권4호
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• pp.23-28
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• 2004

본 논문에서는 Mo을 PMOS의 금속 게이트로 사용하였을 때의 Mo의 특성에 대해서 연구 하였다. Mo을 게이트 물질로 사용한 MOS 커패시터를 제작하였고, 소자의 C-V 특성 곡선으로부터 일함수를 추출하였다. 그 결과 Mo 게이트는 PMOS에 적합한 일함수를 나타내는 것을 알 수 있었다. Mo의 전기적/화학적 안정성을 검증하기 위해서 600, 700, 800 그리고 900℃에서 급속 열처리를 수행하였으며 열처리 이후 유효 산화막의 두께와 일함수의 변화를 살펴보았다. 또한 900℃ 열처리 이후의 XRD 분석을 통해서 Mo 금속 게이트가 SiO₂에 대해서 안정하다는 것을 확인하였다. 4점 탐침기로 측정한 Mo 금속 게이트의 면저항은 10Ω/□ 미만으로 폴리 실리콘에 비해서 매우 작은 값을 나타냈다.