• Title/Summary/Keyword: 시스템보드

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Design and Implementation of the Query Processor and Browser for Content-based Retrieval in Video Database (내용기반 검색을 위한 비디오 데이터베이스 질의처리기 및 브라우저의 설계 및 구현)

  • Lee, Hun-Sun;Kim, Yong-Geol;Bae, Yeong-Rae;Jin, Seong-Il
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.8
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    • pp.2008-2019
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    • 1999
  • As computing technologies are rapidly progressed and widely used, the needs of high quality information have been increased. To satisfy these needs, it is essential to develop a system which can provide an efficient storing, managing and retrieving mechanism of complex multimedia data, esp. video data. In this paper, we propose a metadata model which can support content-based retrieval of video data. And we design and implement an integrated user interface for querying and browser for content-based retrieval in video database which can efficiently access and browse the video clip that user want to see. Proposed query processor and browser can support various user queries by integrating image feature, spatial temporal feature and annotation. Our system supports structure browsing of retrieved result, so users can more exactly and efficiently access relevant video clip. Without browsing the whole video clip, users can know the contents of video by seeing the storyboard. This storyboard facility makes users know more quickly the content of video clip.

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Model Validation of a Fast Ethernet Controller for Performance Evaluation of Network Processors (네트워크 프로세서의 성능 예측을 위한 고속 이더넷 제어기의 상위 레벨 모델 검증)

  • Lee Myeong-jin
    • Journal of KIISE:Computing Practices and Letters
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    • v.11 no.1
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    • pp.92-99
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    • 2005
  • In this paper, we present a high-level design methodology applied on a network system-on-a-chip(SOC) using SystemC. The main target of our approach is to get optimum performance parameters for high network address translation(NAT) throughput. The Fast Ethernet media access controller(MAC) and its direct memory access(DMA) controller are modeled with SystemC in transaction level. They are calibrated through the cycle-based measurement of the operation of the real Verilog register transfer language(RTL). The NAT throughput of the model is within $\pm$10% error compared to the output of the real evaluation board. Simulation speed of the model is more than 100 times laster than the RTL. The validated models are used for intensive architecture exploration to find the performance bottleneck in the NAT router.

The Development and Implementation of Ward Monitoring Service Using Bluetooth Low Energy Scanners for Infectious Disease Response (감염병 대응 비콘 스캐너 기반의 병실 모니터링 서비스 개발)

  • Lee, Kyu-Man;Park, Ju-young
    • Journal of Digital Convergence
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    • v.15 no.3
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    • pp.287-294
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    • 2017
  • This study attempted to develop a beacon scanner based ward monitoring service in order to respond to the new paradigm of medical environment which is trying to introduce ICT technology as medical service to track and manage the spread path of large infectious diseases such as MERS. The study also included beacon hardware development, firmware development for the beacon low-power bluetooth 4.0, and server and web-based dashboard UI development. Using these, we have developed a customized monitoring system that provides functions such as locating patients by location based service and monitoring based on web UI. It is possible to maximize the efficiency of offline hospital services and to value active infection control and patient safety by integrating online technology into the area where online technologies such as beacons are not properly integrated.

The Implementation of Multi-Port UTOPIA Level2 Controller for Interworking ATM Interface Module and MPLS Interface Module (MPLS모듈과 ATM모듈과의 Cell Mode 인터페이스를 위한 Multi-Port지원 UTOPIA-L2 Controller구현)

  • 김광옥;최병철;박완기
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.11C
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    • pp.1164-1170
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    • 2002
  • In the ACE2000 MPLS system, MPLS Interface Module(MIM) is composed of an ATM Interface Module and a HFMA performing a packet forwarding. In the MIM, the HFMA RSAR receive cells from the Physical layer and reassemble the cells. And the IP Lookup controller perform a packet forwarding after packet classification. Forwarded packet is segmented into cells in the HFMA TSAR and transfer to the ALMA for the transmission to an ATM cell switch. When the MIM make use of an ATM Interface Module, it directly connect the ALMA with a PHY layer using the UTOPIA Level2 interface. Then, an ALMA performs Master Mode. Also, the HFMA TSAR performs the Master Mode in the MIM. Therefore, the UTOPIA-L2 Controller of the Slave Mode require for interfacing between an ALMA and a HFHA TSAR. In this paper, we implement the architecture and cell control mechanism for the UTOPIA-L2 Controller supporting Multi-ports.

The Design and Implementation of Sensor Data Processing Module Based on TinyOS Utilizing TinyDB and LineTracer (TinyDB와 라인트레이서를 활용한 TinyOS기반의 센서 데이터 처리 모듈 설계 및 구현)

  • Lee, Sang-Hoon;Moon, Seung-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.10B
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    • pp.883-890
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    • 2006
  • The study of sensor network database is beginning to liven up as we are interested in Ubiquitous Computing technology in hardware, communication, database and so on. Especially, as new smart sensors have capabilities of real-time information gathering and analysis of each sensor node, data processing becomes an important issue in Ubiquitous Computing. In thesis, we have applied TinyDB(query processing system) to carry sensor node with line tracer which can follow the fixed path. After we gathered data around path, we have processed data in TinyDB GUI, gathered data, displayed data on a web server. Also we have a web browser on an embedded board for convenient user interface and implemented touch screen such that users can operate with a finger.

Design of adaptive array antenna utilizing modified on-off algorithm and its real-time implementation on a general-purpose DSP (개선된 On-Off 앨고리듬을 이용한 적응 배열 안테나의 설계와 범용 DSP를 이용한 실시간 구현)

  • 염재흥;안성수;최승원
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.4
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    • pp.997-1005
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    • 1998
  • This paper presents a modified on-off algorithm based on the gradient method for providing the phase of each antenna element more accurately and simply compared to the conventional on-off algorithm. The sup4erisority of theproposed method is due to the fact that the proposed method finds the increase and decrease of the array output power more accurately by utilizing the gradient of array output power with respect to the instantaneous phase of array element. The array antenna adopting to the proposed method formsmaximum beam-pattern along the direction of the desired signal by aligning the phase of every antenna enement. The proposed method is applied to both linear and two-dimentional aray for analyzing the result. The capability of the real-time processing of the proposed technique is confirmed by implementing the proposed algorithm with TMS320C30 Evaluation Module. Since the computational load required to form the beam-pattern per snapshot is small, the proposed method is suitable for the mobile communication system of which the response must be fast. By the results obtained from the application of the proposed method to the CDMA mobile communication environment, it is vreified that the performance of the received signal is consideralbly improved.

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Design and Implementation of Acoustic Echo Canceller (Acoustic Echo Canceller 설계 및 구현)

  • 장수안;문대철
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.2C
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    • pp.291-297
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    • 2004
  • In this paper, a new structure for the AEC(Acoustic Echo Canceller) is proposed in which echo signal components that can be created in mobile communications is effectively eliminated. Block Data Flow Architecture is a parallel architecture that achieves high performance, high efficiency, high throughput, and almost linear speed up. The proposed architecture employs AEC and is implemented using the TMS320C6711 for real-time applications. The proposed AEC shows improved performance by eliminating echoes at 55ms delay path. Since the proposed AEC can also be implemented in Firmware, it is believed to effectively work on various types of echoes if it is applied on CDMA mobile devices. The TMS320C6711 shows much better performance comparing to previous DSPs. For experimental verifications, filtering operation using adaptive algorithm is performed on TMS320C6711 board and error signals resulted from computations are monitored on PC, and then the performance of the implemented AEC is verified through ERLE computation. According the results of simulation, good characteristic of 100dB are shown after 500 sampling data.

Development of e-Learning Platform based on Linux -e-Learning Contents Design Module with ISD Model- (리눅스 기반 인터넷 원격 교육 시스템 개발 - ISD Model 지원 교육용 컨텐츠 설계 모듈 -)

  • 성평식;박춘원
    • Proceedings of the Korea Society for Industrial Systems Conference
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    • 2001.05a
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    • pp.165-183
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    • 2001
  • 지난해부터 인터넷 분야에서 가장 확실한 수익 모델을 갖춘 사업 분야로 e-Learning 분야가 손꼽히면서 많은 온라인 교육 서비스가 우후죽순처럼 등장해 이미 1,000여 개의 서비스가 각축을 벌이고 있다. 그러나 e-Learning은 무엇보다도 학습용 컨텐츠의 품질이 그 성패를 좌우한다 할 때 한국의 온라인 학습 컨텐츠의 품질은 부실하기 이를 데 없다는 게 중론이다. 이는 S/W 공학에서 S/W 품질 보장을 위해 개발 방법론이 중요한 것으로 인식되는 것과 이를 지원하기 위한 Method II등 여러 도구들이 보급되고 있는데 비해 학습 컨텐츠는 그 중요도와 개발이 복잡하고 정교함이 요구됨에도 불구하고 개발 방법론에 대한 인식과 개발방법론을 지원하기 위한 도구가 없음에 기인하는바 크다 할 수 있겠다. 아직까지 국내에서는 MacroMedia Director나 ToolBook, Authorware등 일반적인 저작 도구나 웹 기반의 컨텐츠를 제작하는 Dreamweaver등의 HTML Editor만 있으면 컨텐츠가 만들어 질 수 있는 것으로 착각하고 있는 경우가 많다. 교육 학습용 컨텐츠의 개발 주기를 살펴보면 요구 분석->교수 설계->저작->평가->배포의 단계를 거치게 되는데 이때 학습 컨텐츠의 품질은 사실 요구 분석과 교수 설계 단계에서 결정되게 되며 이 학습 컨텐츠의 품질을 결정하는 단계에서는 IT 분야 지식보다는 오히려 교육 공학적 지식이 더욱 요구된다. 그러나 현실적으로 이 단계의 절차적 복잡성과 전문성으로 인해 거의 대부분의 학습 컨텐츠들이 제대로 개발 주기를 거치지 못하고 검증되지 않은 스토리 보드에 의한 저작 단계로 바로 돌입하고 있는 것이 한국의 실정이라 하겠다. 따라서 본 프로젝트에 의해 개발 된 교수 설계 도구는 교육/학습 컨텐츠의 품질 보증을 위한 방법론인 교육 공학의 체제적 교수 설계 이론 Model (Instructional System Design Model), 특히 그 중에서도 이 분야의 사실상의 표준 이론(de facto standard)인 Dick & Carey 교수와 Gagne 교수의 인지주의 ISD Model을 기반으로 정교한 교수 설계와 코스 맵 설계를 가능하게 함으로써 학습 컨텐츠의 품질 보증 활동을 지원 할 수 있는 도구로 개발하였다. 특히 Linux 기반에서 PHP로 개발 함으로써 Platform에 구애받지 않은 사용 환경을 구현 하였으며 향후 많은 e-Learning Platform에 교수 설계 모듈로 장착 함으로써 기존의 e-Learning Platform들의 가치를 높일 수 있는 계기가 될 것으로 생각한다.

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A New Complex-Number Multiplication Algorithm using Radix-4 Booth Recoding and RB Arithmetic, and a 10-bit CMAC Core Design (Radix-4 Booth Recoding과 RB 연산을 이용한 새로운 복소수 승산 알고리듬 및 10-bit CMAC코어 설계)

  • 김호하;신경욱
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.9
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    • pp.11-20
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    • 1998
  • High-speed complex-number arithmetic units are essential to baseband signal processing of modern digital communication systems such as channel equalization, timing recovery, modulation and demodulation. In this paper, a new complex-number multiplication algorithm is proposed, which is based on redundant binary (RB) arithmetic combined with radix-4 Booth recoding scheme. The proposed algorithm reduces the number of partial product by one-half as compared with the conventional direct method using real-number multipliers and adders. It also leads to a highly parallel architecture and simplified circuit, resulting in high-speed operation and low power dissipation. To demonstrate the proposed algorithm, a prototype complex-number multiplier-accumulator (CMAC) core with 10-bit operands has been designed using 0.8-$\mu\textrm{m}$ N-Well CMOS technology. The designed CMAC core contains about 18,000 transistors on the area of about 1.60 ${\times}$ 1.93 $\textrm{mm}^2$. The functional and speed test results show that it can operate with 120-MHz clock at V$\sub$DD/=3.3-V, and its power consumption is given to about 63-mW.

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A 3d Viewing System for Real-time 3d Display General Monitors (범용 모니터에서 실시간 3d 디스플레이가 가능한 입체 뷰잉 시스템 개발)

  • Lee, Sang-Yong;Chin, Seong-Ah
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.49 no.2
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    • pp.13-19
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    • 2012
  • The techniques of 3d image processing have broadly used in the areas including movies, games, performances, exhibitions. In addition, increasing demands for practical uses have gradually extended to the areas of architecture, medicine, nuclear power plant. However, dominant techniques for 3d image processing seem to depend on multi-camera in which two stereo images are merged into one image. Also the pipeline has limitations to provide real-time 3d viewer in ubiquitous computing. It is not able to be applicable onto most general screens as well. In addition, the techniques can be utilized for the real-time 3d game play without a particular monitor or convertor. Hence, the research presented here is to aim at developing an efficient real-time 3d viewer using only mono camera which do not need post processing for editing as well.