• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.8
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• pp.136-142
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• 2013

CRC features have been added to increase the reliability of the data in memory products for high-speed operation, such as DDR4. High-speed memory products in a shortage of internal timing margin increases for the CRC calculation. Because the existing CRC requires many additional circuit area and delay time. In this paper, we show that the matrix-type CRC and a new XOR/XNOR gate could be improved the circuit area and delay time. Proposed matrix-type CRC can detect all odd-bit errors and can detect even number of bit errors, except for multiples of four bits. In addition, a single error in the error correction can reduce the burden of re-transmission of data between memory products and systems due to CRC errors. In addition, the additional circuit area, compared to existing methods can be improved by 57%. The proposed XOR gate which is consists of six transistors, it can reduce the area overhead of 35% compared to the existing CRC, 50% of the gate delay can be reduced.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.16 no.1
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• pp.13-19
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• 2002

The plasma display panel with the electrode structure of new discharge AND gate was proposed and the driving system for experiment was developed. And discharge AND gate operation was verified. Discharge AND gate operated by the operation speed of 8${\mu}\textrm{s}$ and the operation margin of 20V. It was known to be able to control the discharge of the adjoining scan electrode accurately. Because this method uses the DC discharge, the control of the discharge can be facilitated compared with conventional discharge AND gate. Moreover, because the input discharge and the output discharge of AND gate are separate, the display discharge can be prevented from passing AND gate. Therefore it is possible to app1y to the large screen plasma display. And the decrease of contrast ratio does not occur because the scanning discharge does not influence the picture quality.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38B no.1
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• pp.46-53
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• 2013

Recently, intensive research has been performed for reducing video decoder energy consumption, especially based on DVFS (Dynamic Voltage and Frequency Scaling) technique. Our previous work [1] has proposed the optimal DVFS algorithm for energy reduction in video decoders. In spite of the mathematical optimality of the algorithm, the precondition of known frame decoding cycle/complexity limits its application to some realistic scenarios. This paper overcomes this limitation by frame data size-based estimation of frame decoding complexity. The proposed decoding complexity estimation method shows over 90% accuracy. And with this estimation method and buffer underflow margin of around 20% of frame size, almost same power consumption reduction performance as the optimal algorithm can be achieved.

• Journal of IKEEE
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• v.18 no.4
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• pp.509-516
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• 2014

CRC feature in a high-speed semiconductor memory devices such as DDR4/GDDR5 increases the data reliability. Conventional CRC method have a massive area overhead and long delay time. It leads to insufficient internal timing margins for CRC calculation. This paper, presents a CRC code method that provides error detection and a real-time matrix type CRC. If there are errors in the data, proposed method can alert to the system in a real-time manner. Compare to the conventional method(XOR 6 stage ATM-8 HEC code), the proposing method can improve the error detection circuits up to 60% and XOR stage delay by 33%. Also the real-time error detection scheme can improve the error detection speed to agerage 50% for the entire data bits(UI0~UI9).

• Aerospace Engineering and Technology
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• v.6 no.2
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• pp.211-218
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• 2007

Dual-polarization means to use two orthogonal polarizations, namely two independent channels in communication. This can be used to deal with high datarate caused by large amount of observed data in future LEO satellite. However, when two orthogonal polarizations are not perfectly independent to each other in practical, interference is probably raised in each channel, meaning that noise level in passband increases. XPD (Cross-Polarization Discrimination) is the ratio of the signal level at the output of a receiving antenna that is nominally co-polarized to the transmitting antenna to the output of a receiving antenna of the same gain but nominally orthogonal polarized to the transmitting antenna. In this paper, the influence of XPD on the communication between satellite and ground station was analyzed under the assumption that X-Band dual-polarization was applied to KOMPSAT-2 (KOrea Multi-Purpose SATellite-2). Through analysis, it was shown that more than 3dB of link margin was still achievable despite of worst axial ratio, 2.5dB, at ground station antenna when axial ratio of satellite antenna was about 0.5dB under 99% of environmental availability.

• Aerospace Engineering and Technology
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• v.12 no.2
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• pp.156-162
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• 2013

In the communication between satellite and ground station, data rate can be determined from the data volume and required transmission time. Increasing data rate can be limited according to the available bandwidth. For the reason, it has been popularly studying on high spectral-efficient modulation scheme in large volume data application such as digital video broadcasting service. This paper presents the conceptual design of UHRIT broadcasting in GEO-KOMPSAT-2A (GK2A) mission by using DVB-S2 standard. Based on the recently determined data rate, UHRIT bandwidth was calculated at the various modulation schemes and code rates of DVB-S2 standard. Receiving performance of global user station was also evaluated thorough link analysis by considering that user station is located at the edge of beam coverage. Finally, maximum data rate was analyzed in a situation that COMS HRIT bandwidth should be alternatively applied for UHRIT downlink.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2005.11a
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• pp.73-76
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• 2005

한국방송(KBS)은 전자통신연구원(ETRI)과 공동으로 송수신 안테나의 낮은 분리도(isolation)하에서도 운용이 용이하며 중계기 내부의 왜곡을 보상할 수 있는 DOCR(Digital On-Channel Repeater)을 개발하였다. 개발된 DOCR의 성능과 서비스 커버리지를 측정하기 위하여 수원 지역에서 2004년과 2005년 두 차례의 필드테스트를 공동으로 실시하였다. 본 논문에서는 개발된 DOCR시스템에 대하여 그 특징을 설명하고 수원 지역에서 실시된 필드테스트 결과를 분석한다. 또한, 다양한 세대의 ATSC 수신기를 측정에 사용함으로써 수신기 성능에 따른 DOCR 서비스 커버리지의 변화를 측정하였다. 측정결과에는 DOCR의 사용에 따른 수신성공률, 수신마진, 수신용이성(수신가능각도)등이 포함되며 측정 지역의 수 년간의 테스트 결과를 종합하여 서비스 범위내의 수신성능을 분석한다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.1
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• pp.71-80
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• 2015

LDO(Low Drop-Out) regulators have become an essential building block in modern PMIC(Power Managment IC) to extend battery life of electronic devices. In this paper, we optimize capacitor-less LDO regulator via Geometric Programming(GP) designed using Dongbu HiTek $0.5{\mu}m$ BCDMOS process. GP-compatible models for stability and PSR of LDO regulators are derived based on monomial formulation of transistor characteristics. Average errors between simulation and the proposed model are 9.3 % and 13.1 %, for phase margin and PSR, respectively. Based on the proposed models, the capacitor-less LDO optimization can be performed by changing the PSR constraint of the design. The GP-compatible performance models developed in this work enables the design automation of capacitor-less LDO regulator for different design target specification.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.12
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• pp.31-36
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• 2011

This paper investigates the ESD robustness of the stacked output driver with a 0.13um CMOS process. To represent an actual I/O system, we implemented stacked output driver circuits with pre-drivers and a rail-based power clamp. We implemented eight kinds of circuits varying pre-driver input connections and stacked driver size. The test circuits are examined with TLP measurements. It is shown that breakdown current and voltage can be increased by connecting the pre-driver input to a power supply and using stacked devices of a similar size. Based on the test results, design guideline is suggested to improve ESD robustness of the stacked output drivers.

• The Bulletin of The Korean Astronomical Society
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• v.37 no.2
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• pp.198.1-198.1
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• 2012

저궤도 위성이 발사체에서 분리된 후 탑재 소프트웨어에 의한 초기 동작이 수행되고 나면 초기 운용이 시작된다. 초기 운용 기간에 수행할 모든 절차와 대처 가능한 긴급 상황이 발생할 경우 수행할 절차는 발사 전에 미리 준비된다. 위성의 각 부분의 설계 마진은 최악 조건을 기준으로 반영되어 있기 때문에 발사 이후의 버스 시스템 관점에서의 위성 특성은 요구 사항을 만족하는 범위가 될 것으로 예상이 가능하다. 실제로 발사 후 위성 텔레메트리 분석을 통해 대부분의 항목에서 요구 조건을 만족하는 것으로 확인되었다. 또한 텔레메트리 분석을 통해 설계 단계에서 예상했던 것 보다 정확한 궤도 특성이 반영된 위성 특성을 파악하였다. 이러한 특성은 설계 시 고려했던 상황과 다르더라도 실제 궤도 특성이 반영된 특성이므로 초기 운용 및 정상 운용 시에 정상적인 상황인 것으로 고려해야 한다. 첫째, 지구 알베도 특성에 따라 태양센서 값이 궤도에 따라 변화한다. 위성의 자세가 정확히 태양을 지향하고 있더라도 태양센서에 지구에서 반사된 빛이 입사되어 자세 제어에 영향을 주게 된다. 알베도의 영향은 적도에서 극지방으로 갈수록 커지며, 계절에 따라 다른 특성을 보인다. 알베도의 영향을 최소화하기 위해 자세 제어 모델에 알베도 효과를 고려하거나 알베도 효과를 무시할 수 있을 정도로 자세 제어 오차 한계를 조정할 수 있다. 둘째, 위성의 지구 회피 회전에 의해 태양 전지판의 온도가 궤도에 따라 변화한다. 위성체는 위성체에 장착된 두 개의 별센서의 가시성 확보를 위해 태양 지향 자세에서 요축으로 일정 속도로 회전한다. 남극 부근에서는 두 태양 센서가 모두 지구의 반대편인 남쪽을 지향하도록 하며, 북극 부근에서는 북쪽을 지향하도록 한다. 이 때 두 태양 센서의 방향에 장착된 태양 전지판은 극지방에서 지구 반대편에 위치하므로 다른 태양 전지판에 비해 낮은 온도를 갖게 된다. 이 논문에서는 위성의 궤도 특성에 따른 고려 사항에 대해 설명하였다.