• Journal of the Korea Society of Computer and Information
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• v.16 no.6
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• pp.1-10
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• 2011

In designing multi-core processors, interconnection delay is one of the major constraints in performance improvement. To solve this problem, the 3-dimensional integration technology has been adopted in designing multi-core processors. The 3D multi-core architecture can reduce the physical wire length by stacking cores vertically, leading to reduced interconnection delay and reduced power consumption. However, the power density of 3D multi-core architecture is increased significantly compared to the traditional 2D multi-core architecture, resulting in the increased temperature of the processor. In this paper, the floorplan methods which change the forms of vertical placement of the core and the level-2 cache are analyzed to solve the thermal problems in 3D multi-core processors. According to the experimental results, it is an effective way to reduce the temperature in the processor that the core and the level-2 cache are stacked adjacently. Compared to the floorplan where cores are stacked adjacently to each other, the floorplan where the core is stacked adjacently to the level-2 cache can reduce the temperature by 22% in the case of 4-layers, and by 13% in the case of 2-layers.

• Korean Journal of Optics and Photonics
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• v.15 no.1
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• pp.12-16
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• 2004

We show that the extinction ratio is improved using slight asymmetry in two core refractive indices of polarization independent very short vertical directional couplers with the double-sided deep-ridge (DSDR) waveguide structure. The optimum asymmetry with the maximum extinction ratio and the tolerance of the refractive index of core with the extinction ratio larger 1ha]1 30 ㏈ increase as the thickness of inner cladding layer and the two cores decrease due to the increase of the coupling strength between the two cores. Also, the device length and the tolerance of the device length with the extinction ratio larger than 30 ㏈ decrease as the thickness of the inner cladding layer and the two cores decrease due to the increase of the coupling strength between the two cores. We show that polarization independent vertical directional couplers with the DSDR waveguide structure with the device length less than 100 ${\mu}{\textrm}{m}$ and the extinction ratio larger than 30 ㏈ could be implemented.

• Korean Journal of Optics and Photonics
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• v.15 no.4
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• pp.293-298
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• 2004

We investigate the effect of the wing width and thickness of a Double-Sided Deep-Ridge(DSDR) vertical directional coupler on the coupling length dependent on the polarization, We have found that the DSDR vertical directional coupler without a wing does not have polarization independent coupling lengths. The variation of the coupling length of TE and TM modes and the difference between the coupling lengths of the two modes are negligible as the wing width increases beyond the specific wing width for the same wing thickness. Thus, we can see that a DSDR vertical directional coupler has a wing width larger than the minimum wing width to obtain the polarization independent coupling length. The minimum wing width increases as the wing thickness increases for the same core thickness and as the core thickness decreases for the same wing width. Also, we have found that the minimum wing thickness is determined by the core thickness and the minimum wing thickness decreases as the core thickness increases.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.5
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• pp.31-40
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• 2002

We propose a novel ultra-short asymmetric vertical directional coupler switch (VDCS) with high extinction ratios larger than 30㏈ composed of switching operation induced section (SOIS), extinction ratio adjusted section (ERAS), and extinction ratio enhanced section (ERES). In this VDCSs, switching operation is achieved by changing the refractive index of one core in SOIS. The improvement of extinction ratios larger than 30㏈ for both cross and bar states is achieved by controlling the asymmetry of refractive indices between both cores in ERES. After propagating through ERAS with symmetry in the structure, different extinction ratios between cross and bar states at the end of SOIS are changed to the same value. For this reason, the optimum asymmetry of the refractive indices of cores to have the maximum extinction ratios and the lengths of ERES are the same for cross and bar states. Design guidelines to achieve high extinction ratios with large tolerances are presented.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.9
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• pp.643-651
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• 2001

Fused vertical directional coupler switches (FVCSs) with switching operation induced section (SOIS) and extinction ratio enhanced section (ERES) are proposed. In these FVCSs, switching operation is achieved by changing the refractive indices of both cores in SOIS and improvement of extinction ratios larger than 30dB for both cross and bar states is achieved by controlling the asymmetry of refractive indices between both cores in ERES. In addition, the design guidelines to have high extinction ratios larger than 30dB with large tolerances of the refractive index of cores are presented.

• Korean Journal of Optics and Photonics
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• v.14 no.4
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• pp.359-364
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• 2003

We propose a novel vertical directional coupler with polarization independent very short coupling lengths using the double-sided deep-ridge waveguide structure which could be implemented using double-sided process to polarization insensitive deep-ridge waveguide structures and investigate the effect of various structure parameters on the coupling length. Variation of coupling length for the variation of the waveguide width is smaller than that for the variation of the core thickness. Coupling length decreases as the inner cladding layer thickness and the core thickness decrease. The waveguide width with the polarization independent coupling length decreases as the inner cladding layer thickness decreases for the same core thickness and the core thickness decreases for the same inner cladding layer thickness.

• Journal of the Korea Society of Computer and Information
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• v.17 no.6
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• pp.1-11
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• 2012

As the process technology scales down, multi-core processors cause serious problems such as increased interconnection delay, high power consumption and thermal problems. To solve the problems in 2D multi-core processors, researchers have focused on the 3D multi-core processor architecture. Compared to the 2D multi-core processor, the 3D multi-core processor decreases interconnection delay by reducing wire length significantly, since each core on different layers is connected using vertical through-silicon via(TSV). However, the power density in the 3D multi-core processor is increased dramatically compared to that in the 2D multi-core processor, because multiple cores are stacked vertically. Unfortunately, increased power density causes thermal problems, resulting in high cooling cost, negative impact on the reliability. Therefore, temperature should be considered together with performance in designing 3D multi-core processors. In this work, we analyze the temperature of the cache in quad-core processors varying cache organization. Then, we propose the low-temperature cache organization to overcome the thermal problems. Our evaluation shows that peak temperature of the instruction cache is lower than threshold. The peak temperature of the data cache is higher than threshold when the cache is composed of many ways. According to the results, our proposed cache organization not only efficiently reduces the peak temperature but also reduces the performance degradation for 3D quad-core processors.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.10
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• pp.42-50
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• 2000

We show that both cross and bar states with high extinction ratios larger than 30dB can be achieved at eh same ends of ultra-short fused vertical directional coupler switches with two sections by changing the refractive indices of cores and inner cladding layers less than 1%. Based on the calculation of extinction ratios of cross state and bar state for various refractive index and thickness of inner cladding layer and core using the improved coupled mode theory and beam propagation method, the guidelines for design to achieve large tolerances in refractive indices of core and inner cladding layer in fused vertical directional coupler switches are presented.

• Journal of the Mineralogical Society of Korea
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• v.22 no.2
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• pp.129-138
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• 2009

The XRF core scanner was used, to analyze high resolution chemical elements in deep sea sediment cores from Clarion-Clipperton fracture zone of the northeastern Pacific. Comparison of data estimated by the XRF core scanner with ICP-AES showed relatively weak correlation coefficients between elements (especially Ba, Pb, Sr, Zr) except for Mn contents ($r^2$ > 0.89). However down-core variations of most elements seemed to be well matched each other and furthermore, XRF core scanner data reflected changes of sedimentary facies characterized by sediment colors. Mn/Al ratio dramatically changed at boundaries of facies in BC08-02-05 and BC08-02-13 but progressive changes occured in BC08-02-02, BC08-02-09 and BC08-02-10 where the sediments have been affected by bioturbations. The difference of Mn/Al ratio in each facies (Facies I, Facies II, Facies III) has been caused by redox condition of depositional environment. Vertical change of Mn/Al ratio were divided into two types probably affected by activities of benthic organisms in the study area.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2011.11a
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• pp.328-330
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• 2011

본 논문에서는 OpenMP를 이용하여 HEVC 복호화기의 디블록킹 필터를 병렬화하는 것을 제안한다. 본 논문에서는 HEVC 디블록킹 필터를 병렬화하기 위하여 슬라이스를 병렬 처리가 가능한 코어의 개수만큼의 영역으로 균등하게 분할 한 후 각 영역에 코어를 할당하였다. 각 영역에 할당된 코어들은 자신의 영역 내의 LCU에 대해서 순차 주사 순으로 필터링을 수행하는데, 먼저 영역 내의 모든 LCU에 대하여 수평방향으로 필터링을 수행한다. 이러한 수평방향 필터링이 완료된 후 동일한 영역에 대하여 다시 수직 방향으로 필터링을 수행한다. 본 논문에서 제안하는 OpenMP를 이용한 HEVC 디블록킹 필터 병렬화를 통하여 4-Core 환경에서 복호화기에서 디블록킹 필터링의 수행 시간을 약 2.51배 감소 시켰다.