• Title/Summary/Keyword: 솔더

Search Result 750, Processing Time 0.022 seconds

Fluxless Plasma Soldering of Pb-free Solders on Si-wafer -Effect of Plasma Cleaning - (Si-wafer의 플럭스 리스 플라즈마 무연 솔더링 -플라즈마 클리닝의 영향-)

  • 문준권;김정모;정재필
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.11 no.1
    • /
    • pp.77-85
    • /
    • 2004
  • To evaluate the effect of plasma cleaning on the soldering reliability the plasma cleaning using Ar-10vol%$H_2$ gas was applied on a UBM(Under Bump Metallization). The UBM consisted of Au/ Cu/ Ni/ Al layers which were deposited on a Si-wafer with 20 nm/ 4 $\mu\textrm{m}$/ 4 $\mu\textrm{m}$/ 0.4 $\mu\textrm{m}$ thickness respectively. Sn-3.5%Ag, Sn-3.5%Ag-0.7%Cu and Sn-37%Pb solder balls sized of 500 $\mu\textrm{m}$ in diameter were used. Solder balls on the UBM were plasma reflowed under Ar-10%$H_2$ plasma (with or without plasma cleaning). They were compared with air reflowed solder balls with flux. The spreading ratios of plasma reflowed solder with plasma cleaning was 20-40% higher than that of plasma reflowed solder without plasma cleaning. The shear strength of plasma reflowed solder with plasma cleaning was about 58-65MPa. It showed 60-80% higher than that of plasma reflowed solder without plasma cleaning and 15-35% higher than that of air reflowed solder. Thus it was believed that plasma cleaning for the UBM using Ar-10vol%$H_2$ gas was considerably effective for the improvement of the strength of solder ball.

  • PDF

Experimental and Numerical Study on Board Level Impact Test of SnPb and SnAgCu BGA Assembly Packaging (BGA Type 유.무연 솔더의 기계적 충격에 대한 보드레벨 신뢰성 평가)

  • Lim, Ji-Yeon;Jang, Dong-Young;Ahn, Hyo-Sok
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.15 no.4
    • /
    • pp.77-86
    • /
    • 2008
  • The reliability of leaded and lead-free solders of BGA type packages on a printed circuit board was investigated by employing the standard drop test and 4-point bending test. Tested solder joints were examined by optical microscopy to identify associated failure mode. Three-dimensional finite element analysis(FEM) with ANSYS Workbench v.11 was carried out to understand the mechanical behavior of solder joints under the influence of bending or drop impact. The results of numerical analysis are in good agreement with those obtained by experiments. Packages in the center of the PCB experienced higher stress than those in the perimeter of the PCB. The solder joints located in the outermost comer of the package suffered from higher stress than those located in center region. In both drop and bending impact tests, the lead-free solder showed better performances than the leaded solders. The numerical analysis results indicated that stress and strain behavior of solder joint were dependent on various effective parameters.

  • PDF

Au-Sn합금 도금층의 접촉저항 및 솔더퍼짐성에 미치는 Sn함량의 영향

  • Park, Jae-Wang;Son, In-Jun
    • Proceedings of the Korean Institute of Surface Engineering Conference
    • /
    • 2017.05a
    • /
    • pp.130-130
    • /
    • 2017
  • Au 합금 도금층은 내마모성 및 내식성이 우수하고 접촉저항이 낮기 때문에, 커넥터, 인쇄회로기판 등과 같은 전자부품의 접속단자부에 널리 적용되고 있다. 각 부품들을 효과적으로 전기적 신호를 통해 연결하기 위해서는 낮은 접촉저항이 요구되며, 이러한 Au 합금 도금층의 접촉저항은 합금 원소의 종류 및 함량, 용융 솔더와 전자부품을 고정시키는 표면실장공정에서 받는 theremal aging의 온도와 시간에 따라 변화된다. 현재 전자부품용 커넥터에 실시되고 있는 금 합금도금은 Au-0.3wt%Co합금, Au-0.2wt%Ni합금도금이 대부분 적용되고 있으며, 높은 순도(금 함유량 99.7wt%이상)로 인하여 금 사용량을 절감하기 어려운 실정이다. Sn은 Au와 높은 고용률을 갖는 합금을 형성하는 장점을 갖고 있기에 금 사용량 절감에 큰 기여를 할 수 있을 것으로 예상된다. 따라서 본 연구에서는 Sn을 합금 원소로 사용하여 높은 Sn함량을 갖는 Au 합금 도금층을 제작하고, 무연솔더의 융점보다 더 높은 온도인 533K에서 thermal aging을 실시하여, Sn함량별로 thermal aging에 따른 접촉저항과 솔더퍼짐성의 변화를 기존의 Co, Ni합금과 비교 조사하였다. 또한, 표면분석을 통하여 Au-Sn합금 도금층의 접촉저항이 변화하는 요인에 대해서도 고찰하였다. 표면적 $0.2dm^2$의 순수 동 시편 위에 약 $2{\mu}m$두께의 Ni도금을 실시한 후 Sn 함량을 다르게 준비한 도금 용액(Au 6g/L, Sn 1~8g/L)을 사용하여 Au-Sn합금 도금을 실시하였다. Au-Sn합금 도금층은 전류밀도 0.5ASD, 온도 $40^{\circ}C$에서 약 $0.1{\mu}m$두께가 되도록 도금하였으며, 두께는 형광X선 도금두께측정기로 측정하였다. 금 합금 도금층 내의 Sn함량은 Ti시편 위에 도금한 Au-Sn합금층을 왕수에 용해시킨 다음, ICP를 사용하여 분석하였다. Au-Sn합금 도금층의 접촉저항은 준비된 시편을 533K에서 1분 30초, 3분, 6분 간 열처리한 후, 5회 접촉저항을 측정하여 그 평균값으로 하중에 따른 금 합금 도금층의 접촉저항을 비교하였다. 솔더링성은 솔더볼을 합금 표면에 솔더페이스트를 이용하여 붙인 뒤 533K에서 30초간 열처리하고, 열처리 후 솔더볼의 높이 변화를 측정해 열처리 전 솔더볼의 높이에 비해 퍼진정도를 측정하였다. 또한, 도금층 내의 Sn함량에 따라서 접촉저항이 변화하는 요인을 분석하기 위해서 X선 광전자 분광기를 이용하여 도금층 표면의 정량 분석 및 화학적 결합상태를 분석하였다. ICP분석결과 Au-Sn합금층 내의 Sn함량은 도금용액의 조성별로 9~12wt% Sn 합금층이 형성된 것을 알 수 있었고 기존의 Au-Ni, Au-Co 합금층과 비교해 합금함량이 크게 증가된 것을 알 수 있었다. 또한 접촉저항 측정 결과, 기존의 Au-Ni, Au-Co합금층의 접촉저항과 비교했을 때 Au-Sn합금층의 접촉저항이 더 낮은 것을 알 수 있었다. 또한, 솔더퍼짐성 측정 결과 기존의 Au-Ni, Au-Co합금층과 비교해 솔더퍼짐성이 우수한 것을 확인할 수 있었다. 따라서 전자부품용 접점재료에 합금함량이 높은 Au-Sn합금층을 적용시키면 더 우수한 커넥터의 성능을 얻을 수 있을 뿐 아니라 경제적으로 큰 절약 효과를 기대할 수 있을 것으로 판단된다.

  • PDF

Effects of Temperature and Mechanical Deformation on the Microhardness of Lead free and Composite Solders (무연 복합 솔더의 미소경도에 미치는 기계적 변형과 온도의 영향)

  • Lee Joo Won;Kang Sung K.;Lee Hyuck Mo
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.12 no.2 s.35
    • /
    • pp.121-128
    • /
    • 2005
  • Solder joints in microelectronic devices are frequently operated at an elevated temperature in service. They also experience plastic deformation caused by temperature excursion and difference in thermal expansion coefficients. Deformed solders can go through a recovery and recrystallization process at an elevated temperature, which would alter their microstructure and mechanical properties. In this study, to predict the changes in mechanical properties of Pb-free solder joints at high temperatures, the high temperature microhardness of several Pb-free and composite solders was measured as a function of temperature, deformation, and annealing condition. Solder alleys investigated include pure Sn, Sn-0.7Cu, Sn-3.5Ag, Sn-3.8Ag-0.7Cu, Sn-2.8Ag-7.0Cu (composite), and Sn-2.7Ag-4.9Cu-2.9Ni (composite). Numbers are all in wt.$\%$ unless specified otherwise. Solder pellets were cast at two cooling rates (0.4 and $7^{\circ}C$/s). The pellets were compressively deformed by $30\%$ and $50\%$ and annealed at $150^{\circ}C$ for 2 days. The microhardness was measured as a function of indentation temperature from 25 to $130^{\circ}C$. Their microstructure was also evaluated to correlate with the changes in microhardness.

  • PDF

Characteristic of Intermetallic Compounds for Aging of Lead Free Solders Applied to 48 $\mu$BGA (48 $\mu$BGA에 적용한 무연솔더의 시효처리에 대한 금속간화합물의 특성)

  • Shin, Young-Eui;Lee, Suk;Fujimoto, Kozo;Kim, Jong-Min
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.8 no.3
    • /
    • pp.37-42
    • /
    • 2001
  • The concerns of the toxicity and health hazard of lead in solders have demanded the research to find suitable lead-free solder alloys. It was discussed that effect of the intermetallic formation and structure on the reliability of solder joints. In this study, lead-free solder alloys with compositions of Sn/3.5Ag/0.75Cu, Sn/2.0Ag/0.5Cu/2.0Bi were applied to the 48 $\mu$BGA packages. Also, the lead-free solder alloys compared with eutectic Sn/37Pb solder using shear test under various aging temperature. Common $\mu$BGA with solder components was aged at $130^{\circ}C$, $150^{\circ}C$ and $170^{\circ}C$. And the each temperature applied to 300, 600 and 900 hours. The thickness of the intermetallics was measured for each condition and the activation energy for their growth was computed. The fracture surfaces were analyzed using SEM (Scanning Electron Microscope) with EDS (Energy Dispersive Spectroscopy). These results for reliability of lead-free interconnections are discussed.

  • PDF

Creep Characteristics Verification of FE Model for SnPb Solder (SnPb 솔더에 대한 유한요소모델의 크리프 특성 검증)

  • Han, Chang-Woon;Park, No-Chang;Oh, Chul-Min;Hong, Won-Sik;Song, Byeong-Seok
    • Transactions of the Korean Society of Mechanical Engineers A
    • /
    • v.34 no.1
    • /
    • pp.43-48
    • /
    • 2010
  • The heat sink system for a main board in a network server computer is built on printed circuit board by an anchor structure, mounted by eutectic SnPb solder. The solder creeping is caused by a constant high temperature condition in the computer and it eventually makes fatal failures. The FE model is used to calculate the stress and predict the life of soldered anchor in the computer. In the model, Anand constitutive equation is employed to simulate creep characteristics of solder. The creep test is conducted to verify and calibrate the solder model. A special jig is designed to mitigate the flexure of printed circuit board and to get the creep deformation of solder only in the test. Test results are compared with analysis and calibration is conducted on Anand model's constants. Precise life prediction of soldered anchor in creep condition can be performed by this model.

Study on the Failure Mechanism of a Chip Resistor Solder Joint During Thermal Cycling for Prognostics and Health Monitoring (고장예지를 위한 온도사이클시험에서 칩저항 실장솔더의 고장메커니즘 연구)

  • Han, Chang-Woon;Park, Noh-Chang;Hong, Won-Sik
    • Transactions of the Korean Society of Mechanical Engineers A
    • /
    • v.35 no.7
    • /
    • pp.799-804
    • /
    • 2011
  • A thermal cycling test was conducted on a chip resistor solder joint with real-time failure monitoring. In order to study the failure mechanism of the chip resistor solder joint during the test, the resistance between both ends of the resistor was monitored until the occurrence of failure. It was observed that the monitored resistance first fluctuated linearly according to the temperature change. The initial variation in the resistance occurred at the time during the cycle when there was a decrease in temperature. A more significant change in the resistance followed after a certain number of cycles, during the time when there was an increase in the temperature. In order to explain the failure patterns of the solder joint, a mechanism for the solder failure was suggested, and its validity was proved through FE simulations. Based on the explained failure mechanism, it was shown that prognostics for the solder failure can be implemented by monitoring the resistance change in a thermal cycle condition.

Location-dependent Reliability of Solder Interconnection on Printed Circuit Board in Random Vibration Environment (랜덤진동환경에서 솔더접합부의 인쇄회로기판내 위치에 따른 내구수명 변화 연구)

  • Han, Changwoon
    • Transactions of the Korean Society of Mechanical Engineers A
    • /
    • v.38 no.1
    • /
    • pp.45-50
    • /
    • 2014
  • A vibration test coupon is prepared with nine plastic ball grid array packages on a printed circuit board using SnPb solders, and a random vibration test is conducted on the coupon. Life data from the test are analyzed, and it is shown that over the board, life data is location-dependent. For investigating this location dependency, a finite element model is developed and the equivalent stresses, which are defined based on the stress response functions at each node, are investigated. It is shown that one of the corner solder balls has the maximum equivalent stress at a package during the test. Finally, it is demonstrated that the maximum equivalent stress and durability life are inversely proportional.

The Effect of Insulating Material on WLCSP Reliability with Various Solder Ball Layout (솔더볼 배치에 따른 절연층 재료가 WLCSP 신뢰성에 미치는 영향)

  • Kim, Jong-Hoon;Yang, Seung-Taek;Suh, Min-Suk;Chung, Qwan-Ho;Hong, Joon-Ki;Byun, Kwang-Yoo
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.13 no.4
    • /
    • pp.1-7
    • /
    • 2006
  • A major failure mode for wafer level chip size package (WLCSP) is thermo-mechanical fatigue of solder joints. The mechanical strains and stresses generated by the coefficient of thermal expansion (CTE) mismatch between the die and printed circuit board (PCB) are usually the driving force for fatigue crack initiation and propagation to failure. In a WLCSP process peripheral or central bond pads from the die are redistributed into an area away using an insulating polymer layer and a redistribution metal layer, and the insulating polymer layer affects solder joints reliability by absorption of stresses generated by CTE mismatch. In this study, several insulating polymer materials were applied to WLCSP to investigate the effect of insulating material. It was found that the effect of property of insulating material on WLCSP reliability was altered with a solder ball layout of package.

  • PDF

Solder Bump Deposition Using a Laser Beam (레이저빔을 이용한 솔더범프 적층 공정)

  • Choi, Won-Suk;Kim, Jea-Woon;Kim, Jong-Hyeong;Kim, Joo-Han
    • Transactions of the Korean Society of Mechanical Engineers A
    • /
    • v.36 no.1
    • /
    • pp.37-42
    • /
    • 2012
  • LIFT (laser-induced forward transfer) is an advanced laser processing method used for selectively transferring micron-sized objects. In our study, this process was applied in order to deposit solder balls in microsystem packaging processes for electronics. Locally melted solder paste could be transferred to a rigid substrate using laser pulses. A thin glass plate with a solder cream layer was used as a donor film, and an IR laser pulse (wavelength = 1070 nm) was used to transfer a micron-sized solder ball to the receptor. Mass balance and energy balance were applied to analyze the shape and temperature profiles of the solder paste drops. The transferred solder bumps had measured diameters of 30-40 ${\mu}m$ and thicknesses of 50 ${\mu}m$ in our experiment. The limits and applications of this method are also presented.