• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.4
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• pp.81-87
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• 1989

A cellular array multiplier for performing the multiplication of two elements in the finite field GF($2^m$) is presented in this paper. This multiplier is consisted of three operation part ; the multiplicative operation part, the modular operation part, and the primitive irreducible polynomial operation part. The multiplicative operation part and the modular operation part are composed by the basic cellular arrays designed AND gate and XOR gate. The primitive iirreducible operation part is constructed by XOR gates, D flip-flop circuits and a inverter. The multiplier presented here, is simple and regular for the wire routing and possesses the properties of concurrency and modularity. Also, it is expansible for the multiplication of two elements in the finite field increasing the degree m and suitable for VLSI implementation.

• The KIPS Transactions:PartA
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• v.11A no.1
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• pp.1-10
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• 2004

A cellular array parallel multiplier with parallel-inputs and parallel-outputs for performing the multiplication of two polynomials in the finite fields GF$(2^m)$ is presented in this paper. The presented cellular way parallel multiplier consists of three operation parts: the multiplicative operation part (MULOP), the irreducible polynomial operation part (IPOP), and the modular operation part (MODOP). The MULOP and the MODOP are composed if the basic cells which are designed with AND Bates and XOR Bates. The IPOP is constructed by XOR gates and D flip-flops. This multiplier is simulated by clock period l${\mu}\textrm{s}$ using PSpice. The proposed multiplier is designed by 24 AND gates, 32 XOR gates and 4 D flip-flops when degree m is 4. In case of using AOP irreducible polynomial, this multiplier requires 24 AND gates and XOR fates respectively. and not use D flip-flop. The operating time of MULOP in the presented multiplier requires one unit time(clock time), and the operating time of MODOP using IPOP requires m unit times(clock times). Therefore total operating time is m+1 unit times(clock times). The cellular array parallel multiplier is simple and regular for the wire routing and have the properties of concurrency and modularity. Also, it is expansible for the multiplication of two polynomials in the finite fields with very large m.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.18 no.8
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• pp.1-7
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• 2017

This study numerically evaluates the heat transfer characteristics of a 360-Wh Li-ion battery pack. The analysis was done in ANSYS CFX using different cell arrangements, cell holders, and case materials for a personal mobility device program. A total of four cases of cell arrangements were considered, along with various materials for both the cell holder and the case, such as polypropylene, aluminum, and magnesium alloy. Out of the four cell arrangements, model 2 showed the best heat transfer performance, while aluminum showed the best heat transfer performance for the cell holder and case.

• Journal of Advanced Marine Engineering and Technology
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• v.40 no.9
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• pp.749-755
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• 2016

A new method for measuring the 3-axis cutting forces of a pick cutter by substituting costly 3-D load cells is proposed in this paper. The proposed cutting force measurement method is capable of estimating the 3-axis cutting forces through mechanical constraints using four single-axis compressive load cells and shoulder bolts. The feasibility of the proposed method was verified by finite element analysis, and the accuracy of the force measurement of the developed force measurement device was investigated by conducting linear rock cutting tests. The tests showed that the new cutting force measurement method is able to measure 3-axis cutting forces with a relative error of approximately 6%. These results imply that the new method could be a suitable alternative to conventional 3-D load cells. In addition, it will allow a significant reduction of approximately 20-30% in the costs required for measuring the cutting force when compared to conventional 3-D load cells.

• Journal of Korean Society of Industrial and Systems Engineering
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• v.31 no.4
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• pp.77-85
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• 2008

생물학적인 셀 인젝션 기술은 유전자 주입, 시험관 배양, 인공수정 및 신약개발 분야에서 광범위하게 사용되어 오고 있는 기술이다. 생물공학에서 다루는 셀 인젝션 기술은 크게 착생세포 인젝션과 서스펜디드 셀 인젝션으로 구분할 수 있다. 최근 상용화 장비로 출시되고 있는 것들은 착생세포에 대한 자동 인젝션 시스템이 대부분을 차지하고 있다. 반면, 서스펜디드 셀 인젝션 시스템의 경우는 비교적 최근들어 자동화 장비 및 방법론의 개발에 대한 논의가 이루어지고 있는 실정으로 실제 수많은 연구자들의 노력에 힘입어 서스펜디드 셀을 대상으로 한 통합 자동화 셀 인젝션 시스템의 개발이 가속화되고 있기는 하지만 이에 대한 만족할 만한 성과는 아직 이루어 지지 않고 있는 실정이다. 본 논문은 서스펜디드 셀을 대상으로 한 인젝션 시스템 개발에 관한 것으로 특히 셀 홀딩 시스템과 최적의 인젝션 피펫 궤적을 결정하기 위한 시스템 개발에 관한 것이다. 본 논문에서 다루어지는 서스펜디드 셀은 통합 자동화를 위하여 특별히 고안된 셀홀딩 시스템에 의하여 배열의 형태로 고정되며, 셀 인젝션 시스템은 엠브리오와 인젝션 피켓을 이미지 프로세싱 기술에 의하여 인식하고 피펫의 인젝션 궤적을 결정하는 것을 포함하고 있다.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.301.1-301.1
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• 2014

모바일 전자기기 시장의 큰 증가세로 인해 플래시 메모리 소자에 대한 수요가 급격히 증가하고 있다. 특히, 저 전력 및 고집적 대용량 플래시 메모리의 필요성이 커짐에 따라 플래시 메모리 소자의 비례축소에 대한 연구가 활발히 진행되고 있다. 하지만 10 nm 이하의 게이트 크기를 가지는 플래시 메모리 소자에서 각 셀 간의 간섭에 의한 성능저하가 심각한 문제가 되고 있다. 본 연구에서는 10 nm 이하의 낸드 플래시 메모리 소자에서 인접한 셀 간의 간섭으로 인해 발생하는 전기적 특성의 성능 저하를 관찰하고 메커니즘을 분석하였다. 4개의 소자가 배열된 낸드플래시 메모리의 전기적 특성을 3차원 TCAD 시뮬레이션을 툴을 이용하여 계산하였다. 인접 셀의 프로그램 상태에 따른 측정 셀의 읽기 동작과 쓰기 동작시의 전류-전압 특성을 게이트 크기가 10 nm 부터 30 nm까지 비교하여 동작 메커니즘을 분석하였다. 게이트의 크기가 감소함에 따라 플로팅 게이트에 주입되는 전하의 양은 감소하는데 반해 프로그램 전후의 문턱전압 차는 커진다. 플래시 메모리의 게이트 크기가 줄어듦에 따라 플로팅 게이트의 공핍영역이 차지하는 비율이 커지면서 프로그램 동작 시 주입되는 전하의 양이 급격히 줄어든다. 게이트의 크기가 작아짐에 따라 인접 셀 과의 거리가 좁아지게 되고 이에 따라 프로그램 된 셀의 플로팅 게이트의 전하가 측정 셀의 플로팅 게이트의 공핍영역을 증가시켜 프로그램 특성을 나쁘게 한다. 이 연구 결과는 10 nm 이하의 낸드 플래시 메모리 소자에서 인접한 셀 간의 간섭으로 인해 발생하는 전기적 특성의 성능 저하와 동작 메커니즘을 이해하고 인접 셀의 간섭을 최소로 하는 소자 제작에 많은 도움이 될 것이다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.30 no.3
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• pp.202-208
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• 2019

In this study, an active element pattern (AEP) of a printed dipole was analyzed in 1D and 2D arrays. First, an AEP of the printed dipole was obtained using the simulation in the 2D infinite array. The scan blindness in the 2D array occurred in the E-plane direction at around ${\pm}36^{\circ}$; however, it was barely observed in the 1D array. To analyze the cause of the scan blindness in the 2D array, the dispersion properties of a unit cell was obtained and compared with the scan blindness by frequency change. The difference between the scan blindness of the 1D and 2D arrays was clarified using the comparison of the Q value in the unit cell in the 1D and 2D arrays. Then, the coupling of the electric field in the E-plane direction was observed when nine elements were separated between the two ports in a linearly arranged dipole structure. Finally, the printed dipole array was fabricated, and an AEP was measured for the $11{\times}1$ and $11{\times}3$ sub arrays. The proposed theory was verified using these observations and by comparison with the simulation results.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.42 no.12
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• pp.1057-1064
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• 2014

The satellite on geostationary orbit accommodates multiple payloads into a single spacecraft platform and launched in June 26, 2010. The electrical power required to the satellite during sunlight is generated by a solar array wing. The solar cells are the GaInP/GaAs/Ge Triple Junction cells named Gaget2 cells from RWE Space, which were based on a Spectrolab epitaxy. This paper evaluates solar array power performance at end of design life based on the trend analysis results for the flight data on geostationary orbit. The estimated solar array power performance at end of design life compares with the power performance provided by solar array manufacturer. The solar cells show nominal behavior without significant degradation through the trend analysis results.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.2
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• pp.277-282
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• 2005

The arrangement of I-picture starting times of multiplexed variable bit .ate (VBR) MPEG videos may significantly affect the cell loss ratio (CLR) characteristics of the multiplexed traffic. This paper presents an efficient I-picture arrangement method which can minimize the CLR of the multiplexed traffic when multiple VBR MPEG videos are multiplexed onto a single constant bit rate link. In the proposed method, we use the probability that the arrival rate exceeds the link capacity as the measure for the CLR of the multiplexed traffic. Simulation results show that the proposed method can find more optimal arrangement than existing methods in respect of the CLR.

• Journal of the Korea Society of Computer and Information
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• v.18 no.2
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• pp.9-17
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• 2013

In this paper, we propose a new multiplication algorithm for two polynomials using primitive polynomial with all 1 of coefficient on finite fields GF($2^m$), and design the multiplier with high-speed parallel input-output module structure using the presented multiplication algorithm. The proposed multiplier is designed $m^2$ same basic cells that have a 2-input XOR gate and a 2-input AND gate. Since the basic cell have no a latch circuit, the multiplicative circuit is very simple and is short the delay time $D_A+D_X$ per cell unit. The proposed multiplier is easy to extend the circuit with large m having regularity and modularity by cell array, and is suitable to the implementation of VLSI circuit.