• Title/Summary/Keyword: 샘플링시간

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Generalized cross correlation with phase transform sound source localization combined with steered response power method (조정 응답 파워 방법과 결합된 generalized cross correlation with phase transform 음원 위치 추정)

  • Kim, Young-Joon;Oh, Min-Jae;Lee, In-Sung
    • The Journal of the Acoustical Society of Korea
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    • v.36 no.5
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    • pp.345-352
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    • 2017
  • We propose a methods which is reducing direction estimation error of sound source in the reverberant and noisy environments. The proposed algorithm divides speech signal into voice and unvoice using VAD. We estimate the direction of source when current frame is voiced. TDOA (Time-Difference of Arrival) between microphone array using the GCC-PHAT (Generalized Cross Correlation with Phase Transform) method will be estimated in that frame. Then, we compare the peak value of cross-correlation of two signals applied to estimated time-delay with other time-delay in time-table in order to improve the accuracy of source location. If the angle of current frame is far different from before and after frame in successive voiced frame, the angle of current frame is replaced with mean value of the estimated angle in before and after frames.

Digital Implementation of Backing up control of Truck-trailer type Mobile Robots (트럭-트레일러 타입의 모바일로봇을 위한 귀환 제어기 설계)

  • Ku, Ja-Yl;Park, Chang-Woo
    • 전자공학회논문지 IE
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    • v.46 no.2
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    • pp.33-45
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    • 2009
  • In this paper, the implementation of the backward movement control of a truck-trailer type mobile robot using fuzzy model based control scheme considering the practical constraints, computing time-delay and quantization is presented. We propose the fuzzy feedback controller whose output is delayed with unit sampling period and predicted. The analysis and the design problem considering the computing time-delay become very easy because the proposed controller is syncronized with the sampling time. Also, the stability analysis is made when the quantization exists in the implementation of the fuzzy control architectures and it is shown that if the trivial solution of the fuzzy control system without quantization is asymptotically stable, then the solutions of the fuzzy control system with quantization are uniformly ultimately bounded. The experimental results are shown to verify the effectiveness of the proposed scheme.

Feature Point Filtering Method Based on CS-RANSAC for Efficient Planar Homography Estimating (효과적인 평면 호모그래피 추정을 위한 CS-RANSAC 기반의 특징점 필터링 방법)

  • Kim, Dae-Woo;Yoon, Ui-Nyoung;Jo, Geun-Sik
    • KIPS Transactions on Software and Data Engineering
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    • v.5 no.6
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    • pp.307-312
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    • 2016
  • Markerless tracking for augmented reality using Homography can augment virtual objects correctly and naturally on live view of real-world environment by using correct pose and direction of camera. The RANSAC algorithm is widely used for estimating Homography. CS-RANSAC algorithm is one of the novel algorithm which cooperates a constraint satisfaction problem(CSP) into RANSAC algorithm for increasing accuracy and decreasing processing time. However, CS-RANSAC algorithm can be degraded performance of calculating Homography that is caused by selecting feature points which estimate low accuracy Homography in the sampling step. In this paper, we propose feature point filtering method based on CS-RANSAC for efficient planar Homography estimating the proposed algorithm evaluate which feature points estimate high accuracy Homography for removing unnecessary feature point from the next sampling step using Symmetric Transfer Error to increase accuracy and decrease processing time. To evaluate our proposed method we have compared our algorithm with the bagic CS-RANSAC algorithm, and basic RANSAC algorithm in terms of processing time, error rate(Symmetric Transfer Error), and inlier rate. The experiment shows that the proposed method produces 5% decrease in processing time, 14% decrease in Symmetric Transfer Error, and higher accurate homography by comparing the basic CS-RANSAC algorithm.

Time Delay Control of Noncolocated Flexible System in z-Domain (비병치 유연계의 시간지연 이산제어)

  • 강민식
    • Transactions of the Korean Society of Mechanical Engineers
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    • v.16 no.6
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    • pp.1089-1098
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    • 1992
  • This paper concerns a discrete time control of noncolocated flexible mechanical systems by using time delay relation. A stability criterion of closed-loop system is derived in discrete time domain and a graphic method is developed for designing controllers. Based on this method, a derivative controller is designed for a simply supported uniform beam in the cases of colocation without time delay and of noncolocation with time delay. Some simulation results show the effectiveness of the suggested control.

Improved Time Delay Difference Estimation for Target Tracking using Doppler Information (도플러 효과의 보상을 통한 시간지연 차의 추정)

  • 염석원;윤동헌;윤동욱;고한석
    • The Journal of the Acoustical Society of Korea
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    • v.17 no.8
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    • pp.25-33
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    • 1998
  • 본 논문에서는 한 쌍의 센서를 이용하여 미지의 수중 음향 신호의 시간지연의 차 (Time Delay Difference)를 추정하고 탐지하는 알고리즘을 다루고 있다. 전형적인 시간지연 차의 최적화 추정 기법은 두 신호의 상관관계(Cross Correlation)에 의한 ML(Maximum likelihood)추정으로 구할 수 있지만, 실제 수중 음향 환경 하에서 시간 지연뿐만 아니라 표 적의 이동에 의하여 발생하는 도플러 효과로 신호의 주파수도 변하게 된다. 이러한 신호 주 파수의 올바른 고려 없이 단순히 두 신호의 시간지연만을 추정하는 방법은 불가피한 에러를 생성하게 된다. 본 논문에서는 시시각각 변하는 시간지연의 차를 구하기 위한 준 최적화 기 법인 확률분포 함수의 Recursive Filter에 시간 지연 차와 도플러효과의 2차원 확률분포 함 수를 적용한 추정 알고리즘을 제안한다. 관측된 신호의 리샘플링(Resampling)을 통하여 도 플러 효과를 보상한 후 2차원 Conditional likelihood를 구하고 Projection과 Correction 과정 을 통하여 시간지연과 도플러 효과에 대한 사후확률을 구한다. 그리고 이러한 알고리즘을 가상 시나리오에 대한 모의실험을 통하여 평가한다.

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Active Learning with Pseudo Labeling for Robust Object Detection (강건한 객체탐지 구축을 위해 Pseudo Labeling 을 활용한 Active Learning)

  • ChaeYoon Kim;Sangmin Lee
    • Proceedings of the Korea Information Processing Society Conference
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    • 2023.11a
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    • pp.712-715
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    • 2023
  • 딥러닝 기술의 발전은 고품질의 대규모 데이터에 크게 의존한다. 그러나, 데이터의 품질과 일관성을 유지하는 것은 상당한 비용과 시간이 소요된다. 이러한 문제를 해결하기 위해 최근 연구에서 최소한의 비용으로 최대의 성능을 추구하는 액티브 러닝(active learning) 기법이 주목받고 있는데, 액티브 러닝은 모델 관점에서 불확실성(uncertainty)이 높은 데이터들을 샘플링 하는데 중점을 둔다. 하지만, 레이블 생성에 있어서 여전히 많은 시간적, 자원적 비용이 불가피한 점을 고려할 때 보완이 불가피 하다. 본 논문에서는 의사-라벨링(pseudo labeling)을 활용한 준지도학습(semi-supervised learning) 방식과 학습 손실을 동시에 사용하여 모델의 불확실성(uncertainty)을 측정하는 방법론을 제안한다. 제안 방식은 레이블의 신뢰도(confidence)와 학습 손실의 최적화를 통해 비용 효율적인 데이터 레이블 생성 방식을 제안한다. 특히, 레이블 데이터의 품질(quality) 및 일관성(consistency) 측면에서 딥러닝 모델의 정확도 성능을 높임과 동시에 적은 데이터만으로도 효과적인 학습이 가능할 수 있는 메커니즘을 제안한다.

증발증착법에 의해 형성된 금속 입자를 이용한 단결정 실리콘의 습식식각

  • Go, Yeong-Hwan;Ju, Dong-Hyeok;Yu, Jae-Su
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.438-438
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    • 2012
  • 은(Ag) 또는 금(Au) 입자를 촉매로 이용하여 습식식각을 통해 선택적으로 짧은 시간동안 단결정 실리콘 웨이퍼의 표면을 텍스쳐링하여 반사방지막 특성을 효과적으로 얻을 수 있다. 일반적으로 금속입자는 주로 금속 이온이 포함된 용액이나, 전기증착법을 통해서 실리콘 웨이퍼 표면에 형성시켰지만, 금속입자의 크기와 분포를 조절하기 어려웠다. 하지만, 최근 진공장비를 이용하여 열증발증착법(thermal evaporation)과 급속열처리법(rapid thermal annealing)을 통해서 금속입자를 대면적으로 크기와 분포를 균일하게 조절할 수 있다. 이러한 현상은 열적 비젖음(thermal dewetting) 현상에 의해 실리콘 표면위에 증착된 금속 박막으로부터 나노입자로 형성할 수 있다. 본 연구에서는 실리콘 (100)기판위에 다양한 크기의 은 또는 금 나노입자를 형성시켜 식각용액에 짧은 시간동안 담그어 식각하여, 텍스쳐링 효과와 반사방지(antireflection) 특성을 분석하였다. 실험을 위해 각각 은 또는 금 박막을 열증발증착법을 이용하여 ~3-8 nm의 두께로 형성시켰으며, 급속가열장치를 이용하여 $500^{\circ}C$에서 5분 동안 열처리하였다. 그리고 탈이온수(de-ionized water)에 불화수소와 과산화수소가 혼합된 식각용액에 1-5분 동안 습식식각을 하였다. 각각의 텍스쳐링 된 샘플의 식각의 상태와 깊이를 관찰하기 위해 field emission scanning electron microscopy (FE-SEM)을 이용하여 측정하였으며, UV-vis-NIR spectrophotometer를 이용하여 300 nm에서 1,200 nm의 반사특성을 분석하였다. 또한 RCWA (rigorous coupled wave analysis) 시뮬레이션을 이용하여 텍스쳐링 된 기하학적구조에 대하여 반사방지막 특성을 이론적으로 분석하였다.

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GPU-based dynamic point light particles rendering using 3D textures for real-time rendering (실시간 렌더링 환경에서의 3D 텍스처를 활용한 GPU 기반 동적 포인트 라이트 파티클 구현)

  • Kim, Byeong Jin;Lee, Taek Hee
    • Journal of the Korea Computer Graphics Society
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    • v.26 no.3
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    • pp.123-131
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    • 2020
  • This study proposes a real-time rendering algorithm for lighting when each of more than 100,000 moving particles exists as a light source. Two 3D textures are used to dynamically determine the range of influence of each light, and the first 3D texture has light color and the second 3D texture has light direction information. Each frame goes through two steps. The first step is to update the particle information required for 3D texture initialization and rendering based on the Compute shader. Convert the particle position to the sampling coordinates of the 3D texture, and based on this coordinate, update the colour sum of the particle lights affecting the corresponding voxels for the first 3D texture and the sum of the directional vectors from the corresponding voxels to the particle lights for the second 3D texture. The second stage operates on a general rendering pipeline. Based on the polygon world position to be rendered first, the exact sampling coordinates of the 3D texture updated in the first step are calculated. Since the sample coordinates correspond 1:1 to the size of the 3D texture and the size of the game world, use the world coordinates of the pixel as the sampling coordinates. Lighting process is carried out based on the color of the sampled pixel and the direction vector of the light. The 3D texture corresponds 1:1 to the actual game world and assumes a minimum unit of 1m, but in areas smaller than 1m, problems such as stairs caused by resolution restrictions occur. Interpolation and super sampling are performed during texture sampling to improve these problems. Measurements of the time taken to render a frame showed that 146 ms was spent on the forward lighting pipeline, 46 ms on the defered lighting pipeline when the number of particles was 262144, and 214 ms on the forward lighting pipeline and 104 ms on the deferred lighting pipeline when the number of particle lights was 1,024766.

A Design of a Reconfigurable 4th Order ΣΔ Modulator Using Two Op-amps (2개의 증폭기를 이용한 가변 구조 형의 4차 델타 시그마 변조기)

  • Yang, Su-Hun;Choi, Jeong-Hoon;Yoon, Kwang Sub
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.5
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    • pp.51-57
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    • 2015
  • In this paper, in order to design the A / D converter with a high resolution of 14 bits or more for the biological signal processing, CMOS delta sigma modulator that is a 1.8V power supply voltage - were designed. we propose a new structure of The fourth order delta-sigma modulator that needs four op amps but we use only two op amps. By using a time -interleaving technique, we can re-construct the circuit and reuse the op amps. Also, we proposed a KT/C noise reduction circuit to reduce the thermal noise from a noisy resistor. We adjust the size of sampling capacitor between sampling time and integrating time, so we can reduce almost a half of KT/C noise. The measurement results of the chip is fabricated using a Magna 0.18um CMOS n-well1 poly 6 metal process. Power consumption is $828{\mu}W$ from a 1.8V supply voltage. The peak SNDR is measured as a 75.7dB and 81.3dB of DR at 1kHz input frequency and 256kHz sampling frequency. Measurement results show that KT/C noise reduction circuit enhance the 3dB of SNDR. FOM of the circuit is calculated to be 142dB and 41pJ / step.

Fault Detection and Diagnosis of Induction Motors using LPC and DTW Methods (LPC와 DTW 기법을 이용한 유도전동기의 고장검출 및 진단)

  • Hwang, Chul-Hee;Kim, Yong-Min;Kim, Cheol-Hong;Kim, Jong-Myon
    • Journal of the Korea Society of Computer and Information
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    • v.16 no.3
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    • pp.141-147
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    • 2011
  • This paper proposes an efficient two-stage fault prediction algorithm for fault detection and diagnosis of induction motors. In the first phase, we use a linear predictive coding (LPC) method to extract fault patterns. In the second phase, we use a dynamic time warping (DTW) method to match fault patterns. Experiment results using eight vibration data, which were collected from an induction motor of normal fault states with sampling frequency of 8 kHz and sampling time of 2.2 second, showed that our proposed fault prediction algorithm provides about 45% better accuracy than a conventional fault diagnosis algorithm. In addition, we implemented and tested the proposed fault prediction algorithm on a testbed system including TI's TMS320F2812 DSP that we developed.